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Groups > linux.kernel > #1472288
| From | Andrew Jeffery <andrew@aj.id.au> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | [PATCH v3 3/8] pinctrl: dt-bindings: Add documentation for Aspeed pin controllers |
| Date | 2016-08-30 10:00 +0200 |
| Message-ID | <sbM7D-1Ul-27@gated-at.bofh.it> (permalink) |
| References | <sbM7D-1Ul-3@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
Outline expectations on the pin controller's relationship with the
System Control Unit (SCU) IP through syscon, and document the compatible
strings for 4th and 5th generation Aspeed SoC pin controllers.
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Joel Stanley <joel@jms.id.au>
---
.../devicetree/bindings/pinctrl/pinctrl-aspeed.txt | 65 ++++++++++++++++++++++
1 file changed, 65 insertions(+)
create mode 100644 Documentation/devicetree/bindings/pinctrl/pinctrl-aspeed.txt
diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-aspeed.txt b/Documentation/devicetree/bindings/pinctrl/pinctrl-aspeed.txt
new file mode 100644
index 000000000000..5e60ad18f147
--- /dev/null
+++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-aspeed.txt
@@ -0,0 +1,65 @@
+Aspeed Pin Controllers
+----------------------
+
+The Aspeed SoCs vary in functionality inside a generation but have a common mux
+device register layout.
+
+Required properties:
+- compatible : Should be any one of the following:
+ "aspeed,ast2400-pinctrl"
+ "aspeed,g4-pinctrl"
+ "aspeed,ast2500-pinctrl"
+ "aspeed,g5-pinctrl"
+
+The pin controller node should be a child of a syscon node with the required
+property:
+- compatible: "syscon", "simple-mfd"
+
+Refer to the the bindings described in
+Documentation/devicetree/bindings/mfd/syscon.txt
+
+Subnode Format
+--------------
+
+The required properties of child nodes are (as defined in pinctrl-bindings):
+- function
+- groups
+
+Each function has only one associated pin group. Each group is named by its
+function. The following values for the function and groups properties are
+supported:
+
+aspeed,ast2400-pinctrl, aspeed,g4-pinctrl:
+
+ACPI BMCINT DDCCLK DDCDAT FLACK FLBUSY FLWP GPID0 GPIE0 GPIE2 GPIE4 GPIE6 I2C10
+I2C11 I2C12 I2C13 I2C3 I2C4 I2C5 I2C6 I2C7 I2C8 I2C9 LPCPD LPCPME LPCSMI MDIO1
+MDIO2 NCTS1 NCTS3 NCTS4 NDCD1 NDCD3 NDCD4 NDSR1 NDSR3 NDTR1 NDTR3 NRI1 NRI3
+NRI4 NRTS1 NRTS3 PWM0 PWM1 PWM2 PWM3 PWM4 PWM5 PWM6 PWM7 RGMII1 RMII1 ROM16
+ROM8 ROMCS1 ROMCS2 ROMCS3 ROMCS4 RXD1 RXD3 RXD4 SD1 SGPMI SIOPBI SIOPBO TIMER3
+TIMER5 TIMER6 TIMER7 TIMER8 TXD1 TXD3 TXD4 UART6 VGAHS VGAVS VPI18 VPI24 VPI30
+VPO12 VPO24
+
+aspeed,ast2500-pinctrl, aspeed,g5-pinctrl:
+
+GPID0 GPID2 GPIE0 I2C10 I2C11 I2C12 I2C13 I2C14 I2C3 I2C4 I2C5 I2C6 I2C7 I2C8
+I2C9 MAC1LINK MDIO1 MDIO2 OSCCLK PEWAKE PWM0 PWM1 PWM2 PWM3 PWM4 PWM5 PWM6 PWM7
+RGMII1 RGMII2 RMII1 RMII2 SD1 SPI1 TIMER4 TIMER5 TIMER6 TIMER7 TIMER8
+
+Examples:
+
+syscon: scu@1e6e2000 {
+ compatible = "syscon", "simple-mfd";
+ reg = <0x1e6e2000 0x1a8>;
+
+ pinctrl: pinctrl {
+ compatible = "aspeed,g4-pinctrl";
+
+ pinctrl_i2c3_default: i2c3_default {
+ function = "I2C3";
+ groups = "I2C3";
+ };
+ };
+};
+
+Please refer to pinctrl-bindings.txt in this directory for details of the
+common pinctrl bindings used by client devices.
--
2.9.3.1.g0db844e
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[PATCH v3 0/8] aspeed: Add pinctrl and gpio drivers Andrew Jeffery <andrew@aj.id.au> - 2016-08-30 10:00 +0200
[PATCH v3 7/8] pinctrl: Add pinctrl-aspeed-g5 driver Andrew Jeffery <andrew@aj.id.au> - 2016-08-30 10:00 +0200
Re: [PATCH v3 7/8] pinctrl: Add pinctrl-aspeed-g5 driver Linus Walleij <linus.walleij@linaro.org> - 2016-09-07 17:00 +0200
[PATCH v3 1/8] MAINTAINERS: Add glob for Aspeed devicetree bindings Andrew Jeffery <andrew@aj.id.au> - 2016-08-30 10:00 +0200
Re: [PATCH v3 1/8] MAINTAINERS: Add glob for Aspeed devicetree bindings Linus Walleij <linus.walleij@linaro.org> - 2016-09-07 16:40 +0200
Re: [PATCH v3 1/8] MAINTAINERS: Add glob for Aspeed devicetree bindings Arnd Bergmann <arnd@arndb.de> - 2016-09-07 16:50 +0200
[PATCH v3 4/8] gpio: dt-bindings: Add documentation for Aspeed GPIO controllers Andrew Jeffery <andrew@aj.id.au> - 2016-08-30 10:00 +0200
Re: [PATCH v3 4/8] gpio: dt-bindings: Add documentation for Aspeed GPIO controllers Rob Herring <robh@kernel.org> - 2016-09-02 17:10 +0200
Re: [PATCH v3 4/8] gpio: dt-bindings: Add documentation for Aspeed GPIO controllers Linus Walleij <linus.walleij@linaro.org> - 2016-09-07 16:50 +0200
Re: [PATCH v3 4/8] gpio: dt-bindings: Add documentation for Aspeed GPIO controllers Andrew Jeffery <andrew@aj.id.au> - 2016-09-08 03:20 +0200
[PATCH v3 3/8] pinctrl: dt-bindings: Add documentation for Aspeed pin controllers Andrew Jeffery <andrew@aj.id.au> - 2016-08-30 10:00 +0200
Re: [PATCH v3 3/8] pinctrl: dt-bindings: Add documentation for Aspeed pin controllers Linus Walleij <linus.walleij@linaro.org> - 2016-09-07 16:50 +0200
[PATCH v3 2/8] syscon: dt-bindings: Add documentation for Aspeed system control units Andrew Jeffery <andrew@aj.id.au> - 2016-08-30 10:00 +0200
Re: [PATCH v3 2/8] syscon: dt-bindings: Add documentation for Aspeed system control units Linus Walleij <linus.walleij@linaro.org> - 2016-09-07 16:40 +0200
Re: [PATCH v3 2/8] syscon: dt-bindings: Add documentation for Aspeed system control units Lee Jones <lee.jones@linaro.org> - 2016-09-07 18:30 +0200
Re: [PATCH v3 2/8] syscon: dt-bindings: Add documentation for Aspeed system control units Andrew Jeffery <andrew@aj.id.au> - 2016-09-08 03:10 +0200
Re: [PATCH v3 2/8] syscon: dt-bindings: Add documentation for Aspeed system control units Andrew Jeffery <andrew@aj.id.au> - 2016-09-08 03:10 +0200
Re: [PATCH v3 2/8] syscon: dt-bindings: Add documentation for Aspeed system control units Lee Jones <lee.jones@linaro.org> - 2016-09-08 09:10 +0200
Re: [PATCH v3 5/8] pinctrl: Add core support for Aspeed SoCs Linus Walleij <linus.walleij@linaro.org> - 2016-09-07 17:00 +0200
Re: [PATCH v3 5/8] pinctrl: Add core support for Aspeed SoCs Andrew Jeffery <andrew@aj.id.au> - 2016-09-08 06:00 +0200
Re: [PATCH v3 6/8] pinctrl: Add pinctrl-aspeed-g4 driver Linus Walleij <linus.walleij@linaro.org> - 2016-09-07 17:00 +0200
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