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Groups > linux.kernel > #1476270

[PATCH v3 2/9] arm64: Use consistent naming for errata handling

From Suzuki K Poulose <suzuki.poulose@arm.com>
Newsgroups linux.kernel
Subject [PATCH v3 2/9] arm64: Use consistent naming for errata handling
Date 2016-09-05 12:10 +0200
Message-ID <sdZ0K-2iZ-33@gated-at.bofh.it> (permalink)
References <sdYR4-209-39@gated-at.bofh.it>
Organization linux.* mail to news gateway

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This is a cosmetic change to rename the functions dealing with
the errata work arounds to be more consistent with their naming.

1) check_local_cpu_errata() => update_cpu_errata_workarounds()
check_local_cpu_errata() actually updates the system's errata work
arounds. So rename it to reflect the same.

2) verify_local_cpu_errata() => verify_local_cpu_errata_workarounds()
Use errata_workarounds instead of _errata.

Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Andre Przywara <andre.przywara@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
---
 arch/arm64/include/asm/cpufeature.h | 4 ++--
 arch/arm64/kernel/cpu_errata.c      | 4 ++--
 arch/arm64/kernel/cpufeature.c      | 2 +-
 arch/arm64/kernel/cpuinfo.c         | 2 +-
 4 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h
index df47969..8289295 100644
--- a/arch/arm64/include/asm/cpufeature.h
+++ b/arch/arm64/include/asm/cpufeature.h
@@ -194,10 +194,10 @@ void __init setup_cpu_features(void);
 void update_cpu_capabilities(const struct arm64_cpu_capabilities *caps,
 			    const char *info);
 void enable_cpu_capabilities(const struct arm64_cpu_capabilities *caps);
-void check_local_cpu_errata(void);
+void update_cpu_errata_workarounds(void);
 void __init enable_errata_workarounds(void);
 
-void verify_local_cpu_errata(void);
+void verify_local_cpu_errata_workarounds(void);
 void verify_local_cpu_capabilities(void);
 
 u64 read_system_reg(u32 id);
diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c
index 82b0fc2..5836b3d 100644
--- a/arch/arm64/kernel/cpu_errata.c
+++ b/arch/arm64/kernel/cpu_errata.c
@@ -116,7 +116,7 @@ const struct arm64_cpu_capabilities arm64_errata[] = {
  * and the related information is freed soon after. If the new CPU requires
  * an errata not detected at boot, fail this CPU.
  */
-void verify_local_cpu_errata(void)
+void verify_local_cpu_errata_workarounds(void)
 {
 	const struct arm64_cpu_capabilities *caps = arm64_errata;
 
@@ -131,7 +131,7 @@ void verify_local_cpu_errata(void)
 		}
 }
 
-void check_local_cpu_errata(void)
+void update_cpu_errata_workarounds(void)
 {
 	update_cpu_capabilities(arm64_errata, "enabling workaround for");
 }
diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
index 4a19138d..643c856 100644
--- a/arch/arm64/kernel/cpufeature.c
+++ b/arch/arm64/kernel/cpufeature.c
@@ -1018,7 +1018,7 @@ void verify_local_cpu_capabilities(void)
 	if (!sys_caps_initialised)
 		return;
 
-	verify_local_cpu_errata();
+	verify_local_cpu_errata_workarounds();
 	verify_local_cpu_features(arm64_features);
 	verify_local_elf_hwcaps(arm64_elf_hwcaps);
 	if (system_supports_32bit_el0())
diff --git a/arch/arm64/kernel/cpuinfo.c b/arch/arm64/kernel/cpuinfo.c
index ed1b84f..4fa7b73 100644
--- a/arch/arm64/kernel/cpuinfo.c
+++ b/arch/arm64/kernel/cpuinfo.c
@@ -364,7 +364,7 @@ static void __cpuinfo_store_cpu(struct cpuinfo_arm64 *info)
 
 	cpuinfo_detect_icache_policy(info);
 
-	check_local_cpu_errata();
+	update_cpu_errata_workarounds();
 }
 
 void cpuinfo_store_cpu(void)
-- 
2.7.4

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Thread

[PATCH v3 0/9] arm64: Work around for mismatched cache line size Suzuki K Poulose <suzuki.poulose@arm.com> - 2016-09-05 12:00 +0200
  [PATCH v3 5/9] arm64: insn: Add helpers for adrp offsets Suzuki K Poulose <suzuki.poulose@arm.com> - 2016-09-05 12:00 +0200
  [PATCH v3 1/9] arm64: Set the safe value for L1 icache policy Suzuki K Poulose <suzuki.poulose@arm.com> - 2016-09-05 12:10 +0200
  [PATCH v3 8/9] arm64: Refactor sysinstr exception handling Suzuki K Poulose <suzuki.poulose@arm.com> - 2016-09-05 12:10 +0200
    Re: [PATCH v3 8/9] arm64: Refactor sysinstr exception handling Will Deacon <will.deacon@arm.com> - 2016-09-07 10:50 +0200
    Re: [PATCH v3 8/9] arm64: Refactor sysinstr exception handling Andre Przywara <andre.przywara@arm.com> - 2016-09-07 13:40 +0200
  [PATCH v3 3/9] arm64: Rearrange CPU errata workaround checks Suzuki K Poulose <suzuki.poulose@arm.com> - 2016-09-05 12:10 +0200
  [PATCH v3 2/9] arm64: Use consistent naming for errata handling Suzuki K Poulose <suzuki.poulose@arm.com> - 2016-09-05 12:10 +0200
    Re: [PATCH v3 2/9] arm64: Use consistent naming for errata handling Andre Przywara <andre.przywara@arm.com> - 2016-09-07 12:40 +0200
  [PATCH v3 9/9] arm64: Work around systems with mismatched cache line sizes Suzuki K Poulose <suzuki.poulose@arm.com> - 2016-09-05 12:10 +0200
    Re: [PATCH v3 9/9] arm64: Work around systems with mismatched cache  line sizes Ard Biesheuvel <ard.biesheuvel@linaro.org> - 2016-09-05 12:20 +0200
      Re: [PATCH v3 9/9] arm64: Work around systems with mismatched cache  line sizes Suzuki K Poulose <Suzuki.Poulose@arm.com> - 2016-09-05 12:30 +0200

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