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Re: [PATCH v3 4/9] arm64: cpufeature: Document the rules of safe value for features

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On 06/01/17 12:30, Catalin Marinas wrote:
> On Wed, Jan 04, 2017 at 05:49:02PM +0000, Suzuki K. Poulose wrote:
>> --- a/arch/arm64/include/asm/cpufeature.h
>> +++ b/arch/arm64/include/asm/cpufeature.h
>> @@ -29,7 +29,21 @@
>>  #include <linux/jump_label.h>
>>  #include <linux/kernel.h>
>>
>> -/* CPU feature register tracking */
>> +/*
>> + * CPU feature register tracking
>> + *
>> + * The safe value of a CPUID feature field is dependent on the implications
>> + * of the values assigned to it by the architecture. Based on the relationship
>> + * between the values, the features are classified into 3 types.
>> + *
>> + * a) LOWER_SAFE - The value 'n+1' indicates, value 'n' and some
>> + *    additional features. (where n >= 0). The smaller value (n) is
>> + *    considered safer in this case.
>> + * b) HIGHER_SAFE - The value 'n+1' is safer than 'n' (for n>= 0).
>> + * c) EXACT - If the values of the feature don't have any relationship,
>> + *    a predefined safe value is used.
>> + */
>
> I don't think this text fully describes what is actually compared. You
> could say something that the lowest value of all the CPUs is chosen for
> LOWER_SAFE, highest for HIGHER_SAFE and it is expected that all CPUs
> have the same value for a field when EXACT is specified.

Ok. I have changed it as below :

/*
  * CPU feature register tracking
  *
  * The safe value of a CPUID feature field is dependent on the implications
  * of the values assigned to it by the architecture. Based on the relationship
  * between the values, the features are classified into 3 types - LOWER_SAFE,
  * HIGHER_SAFE and EXACT.
  *
  * The lowest value of all the CPUs is chosen for LOWER_SAFE and highest
  * for HIGHER_SAFE. It is expected that all CPUs have the same value for
  * a field when EXACT is specified, failing which, the safe value specified
  * in the table is chosen.
  */


Suzuki

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[PATCH v3 0/9] arm64: Expose CPUID registers via emulation Suzuki K Poulose <suzuki.poulose@arm.com> - 2017-01-04 19:50 +0100
  [PATCH v3 6/9] arm64: Add helper to decode register from instruction Suzuki K Poulose <suzuki.poulose@arm.com> - 2017-01-04 19:50 +0100
    Re: [PATCH v3 6/9] arm64: Add helper to decode register from  instruction Catalin Marinas <catalin.marinas@arm.com> - 2017-01-05 18:50 +0100
  [PATCH v3 8/9] arm64: cpufeature: Expose CPUID registers by emulation Suzuki K Poulose <suzuki.poulose@arm.com> - 2017-01-04 19:50 +0100
    Re: [PATCH v3 8/9] arm64: cpufeature: Expose CPUID registers by  emulation Catalin Marinas <catalin.marinas@arm.com> - 2017-01-05 19:40 +0100
  [PATCH v3 4/9] arm64: cpufeature: Document the rules of safe value for features Suzuki K Poulose <suzuki.poulose@arm.com> - 2017-01-04 19:50 +0100
    Re: [PATCH v3 4/9] arm64: cpufeature: Document the rules of safe  value for features Catalin Marinas <catalin.marinas@arm.com> - 2017-01-06 13:40 +0100
      Re: [PATCH v3 4/9] arm64: cpufeature: Document the rules of safe  value for features Suzuki K Poulose <Suzuki.Poulose@arm.com> - 2017-01-09 11:50 +0100
        Re: [PATCH v3 4/9] arm64: cpufeature: Document the rules of safe  value for features Catalin Marinas <catalin.marinas@arm.com> - 2017-01-09 13:10 +0100
  [PATCH v3 9/9] arm64: Documentation - Expose CPU feature registers Suzuki K Poulose <suzuki.poulose@arm.com> - 2017-01-04 19:50 +0100
    Re: [PATCH v3 9/9] arm64: Documentation - Expose CPU feature  registers Catalin Marinas <catalin.marinas@arm.com> - 2017-01-06 13:20 +0100
      Re: [PATCH v3 9/9] arm64: Documentation - Expose CPU feature  registers Suzuki K Poulose <Suzuki.Poulose@arm.com> - 2017-01-09 12:10 +0100
  [PATCH v3 2/9] arm64: cpufeature: remove explicit RAZ fields Suzuki K Poulose <suzuki.poulose@arm.com> - 2017-01-04 19:50 +0100
    Re: [PATCH v3 2/9] arm64: cpufeature: remove explicit RAZ fields Catalin Marinas <catalin.marinas@arm.com> - 2017-01-05 18:20 +0100
  [PATCH v3 1/9] arm64: cpufeature: treat unknown fields as RES0 Suzuki K Poulose <suzuki.poulose@arm.com> - 2017-01-04 19:50 +0100
    Re: [PATCH v3 1/9] arm64: cpufeature: treat unknown fields as RES0 Catalin Marinas <catalin.marinas@arm.com> - 2017-01-05 18:10 +0100
  [PATCH v3 5/9] arm64: cpufeature: Define helpers for sys_reg id Suzuki K Poulose <suzuki.poulose@arm.com> - 2017-01-04 19:50 +0100
    Re: [PATCH v3 5/9] arm64: cpufeature: Define helpers for sys_reg id Catalin Marinas <catalin.marinas@arm.com> - 2017-01-05 18:30 +0100
  [PATCH v3 7/9] arm64: cpufeature: Track user visible fields Suzuki K Poulose <suzuki.poulose@arm.com> - 2017-01-04 19:50 +0100
    Re: [PATCH v3 7/9] arm64: cpufeature: Track user visible fields Catalin Marinas <catalin.marinas@arm.com> - 2017-01-05 19:10 +0100
      Re: [PATCH v3 7/9] arm64: cpufeature: Track user visible fields Suzuki K Poulose <Suzuki.Poulose@arm.com> - 2017-01-06 12:20 +0100

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