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Re: [PATCH v2 2/5] arm64: Work around Falkor erratum 1003

From Christoffer Dall <christoffer.dall@linaro.org>
Newsgroups linux.kernel
Subject Re: [PATCH v2 2/5] arm64: Work around Falkor erratum 1003
Date 2017-01-04 11:40 +0100
Message-ID <sVR98-3si-11@gated-at.bofh.it> (permalink)
References <sTRGh-4dP-1@gated-at.bofh.it> <sTRGh-4dP-3@gated-at.bofh.it>
Organization linux.* mail to news gateway

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On Thu, Dec 29, 2016 at 05:43:32PM -0500, Christopher Covington wrote:
> From: Shanker Donthineni <shankerd@codeaurora.org>
> 
> On the Qualcomm Datacenter Technologies Falkor v1 CPU, memory accesses may
> allocate TLB entries using an incorrect ASID when TTBRx_EL1 is being
> updated. Changing the TTBRx_EL1[ASID] and TTBRx_EL1[BADDR] fields
> separately using a reserved ASID will ensure that there are no TLB entries
> with incorrect ASID after changing the the ASID.

When we restore guest state in KVM, we completely save and restore
TTBRx_EL1 from EL2. Would that be affected by this erratum?

Thanks,
-Christoffer

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Re: [PATCH v2 2/5] arm64: Work around Falkor erratum 1003 Christoffer Dall <christoffer.dall@linaro.org> - 2017-01-04 11:40 +0100
  Re: [PATCH v2 2/5] arm64: Work around Falkor erratum 1003 Christopher Covington <cov@codeaurora.org> - 2017-01-11 14:20 +0100

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