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Re: [PATCH v4 4/5] pinctrl: aspeed-g5: Add mux configuration for all pins

From Linus Walleij <linus.walleij@linaro.org>
Newsgroups linux.kernel
Subject Re: [PATCH v4 4/5] pinctrl: aspeed-g5: Add mux configuration for all pins
Date 2016-12-28 01:30 +0100
Message-ID <sTahX-KT-9@gated-at.bofh.it> (permalink)
References <sQnbH-2wp-15@gated-at.bofh.it> <sQnbI-2wp-27@gated-at.bofh.it>
Organization linux.* mail to news gateway

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On Tue, Dec 20, 2016 at 8:35 AM, Andrew Jeffery <andrew@aj.id.au> wrote:

> The patch introducing the g5 pinctrl driver implemented a smattering of
> pins to flesh out the implementation of the core and provide bare-bones
> support for some OpenPOWER platforms and the AST2500 evaluation board.
> Now, update the bindings document to reflect the complete functionality
> and implement the necessary pin configuration tables in the driver.
>
> Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
> Acked-by: Joel Stanley <joel@jms.id.au>
> Acked-by: Rob Herring <robh@kernel.org>

Patch applied.

Yours,
Linus Walleij

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Thread

[PATCH v4 0/5] pinctrl: aspeed: Implement remaining pins Andrew Jeffery <andrew@aj.id.au> - 2016-12-20 08:40 +0100
  Re: [PATCH v4 3/5] pinctrl: aspeed-g4: Add mux configuration for all pins Linus Walleij <linus.walleij@linaro.org> - 2016-12-27 23:20 +0100
  Re: [PATCH v4 4/5] pinctrl: aspeed-g5: Add mux configuration for all pins Linus Walleij <linus.walleij@linaro.org> - 2016-12-28 01:30 +0100

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