[PATCH v10 0/5] Enabling Ring 3 MONITOR/MWAIT feature for Knights Landing

From	Grzegorz Andrejczuk <grzegorz.andrejczuk@intel.com>
Newsgroups	linux.kernel
Subject	[PATCH v10 0/5] Enabling Ring 3 MONITOR/MWAIT feature for Knights Landing
Date	2016-12-16 19:10 +0100
Message-ID	<sP57b-75S-9@gated-at.bofh.it> (permalink)
Organization	linux.* mail to news gateway

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Following patches enable the use of the feature that allows
the some Intel Xeon Phi processors to use MONITOR/MWAIT instructions
outside ring 0. This feature allows userspace application to use
more efficient synchronization operations, which improves performance
and energy efficiency. 

v10:
Included Piotr's patch for Knights Mill
Included Dave's comments from internal review
Rewritten commit messages
Removed x86_64 config requirement
Fixed kernel boot parameter description
Used set_bit to update HWCAP2 bit
Rebased to kernel 4.9

v9:
Removed PHI prefix from defines

v8:
Updated commit messages
Removed logging
Used msr_set/clear_bit functions instesd of wrmsrl
Fixed documentation
Renamed HWCAP2_PHIR3MWAIT to HWCAP2_RING3MWAIT

v7:
Changed order of the patches
Changed the name of MSR to MSR_MISC_FEATURE_ENABLES
Used bit 25 from word 3 to expose feature

v6: 

v5:
Added phir3mwait=disable cmdline switch
Fixed typos

v4:
Wrapped the enabling code by CONFIG_X86_64
Moved probe_ function call from early_intel_init to intel_init
Fixed commit messages

v3:
Included Dave's and Thomas' comments

v2:
Added check MSR before wrmsrl
Shortened names
Used Word 3 for feature init_scattered_cpuid_features()
Fixed commit messages

Grzegorz Andrejczuk (4):
  x86/msr: add MSR_MISC_FEATURE_ENABLES and RING3MWAIT bit
  x86/elf: add HWCAP2 to expose ring 3 MONITOR/MWAIT
  x86/cpufeature: add RING3MWAIT to CPU features
  x86/cpufeature: enable RING3MWAIT for Knights Landing

Piotr Luc (1):
  x86/cpufeature: enable RING3MWAIT for Knights Mill

 Documentation/kernel-parameters.txt |  3 +++
 arch/x86/include/asm/cpufeatures.h  |  2 +-
 arch/x86/include/asm/elf.h          |  9 +++++++++
 arch/x86/include/asm/msr-index.h    |  6 ++++++
 arch/x86/include/uapi/asm/hwcap2.h  |  7 +++++++
 arch/x86/kernel/cpu/common.c        |  3 +++
 arch/x86/kernel/cpu/intel.c         | 36 ++++++++++++++++++++++++++++++++++++
 7 files changed, 65 insertions(+), 1 deletion(-)
 create mode 100644 arch/x86/include/uapi/asm/hwcap2.h

-- 
2.5.1

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[PATCH v10 0/5] Enabling Ring 3 MONITOR/MWAIT feature for Knights Landing Grzegorz Andrejczuk <grzegorz.andrejczuk@intel.com> - 2016-12-16 19:10 +0100
  [PATCH v10 4/5] x86/cpufeature: enable RING3MWAIT for Knights Landing Grzegorz Andrejczuk <grzegorz.andrejczuk@intel.com> - 2016-12-16 19:10 +0100
    Re: [PATCH v10 4/5] x86/cpufeature: enable RING3MWAIT for Knights  Landing kbuild test robot <lkp@intel.com> - 2016-12-16 22:20 +0100
  [PATCH v10 2/5] x86/elf: add HWCAP2 to expose ring 3 MONITOR/MWAIT Grzegorz Andrejczuk <grzegorz.andrejczuk@intel.com> - 2016-12-16 19:10 +0100
  [PATCH v10 3/5] x86/cpufeature: add RING3MWAIT to CPU features Grzegorz Andrejczuk <grzegorz.andrejczuk@intel.com> - 2016-12-16 19:10 +0100
  [PATCH v10 1/5] x86/msr: add MSR_MISC_FEATURE_ENABLES and RING3MWAIT bit Grzegorz Andrejczuk <grzegorz.andrejczuk@intel.com> - 2016-12-16 19:10 +0100

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