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Re: [PATCH 2/6] clk: sunxi-ng: set the parent rate when adjustin CPUX clock on A33

From Maxime Ripard <maxime.ripard@free-electrons.com>
Newsgroups linux.kernel
Subject Re: [PATCH 2/6] clk: sunxi-ng: set the parent rate when adjustin CPUX clock on A33
Date 2016-12-14 10:40 +0100
Message-ID <sOecx-4L4-3@gated-at.bofh.it> (permalink)
References <sNXEJ-2Zs-33@gated-at.bofh.it> <sNXEK-2Zs-49@gated-at.bofh.it> <sNXEK-2Zs-47@gated-at.bofh.it> <sOecx-4L4-5@gated-at.bofh.it>
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On Wed, Dec 14, 2016 at 04:54:14AM +0800, Icenowy Zheng wrote:
> 
> 
> 13.12.2016, 23:44, "Maxime Ripard" <maxime.ripard@free-electrons.com>:
> > On Tue, Dec 13, 2016 at 11:22:48PM +0800, Icenowy Zheng wrote:
> >>  The CPUX clock on A33, which is for the Cortex-A7 cores, is designed to
> >>  be changeable by changing the rate of PLL_CPUX.
> >>
> >>  Add CLK_SET_RATE_PARENT flag to this clock.
> >>
> >>  Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
> >
> > Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
> 
> Excuse me, have you merged this patch?

Yes, sorry, that's what I meant :)

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

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Re: [PATCH 2/6] clk: sunxi-ng: set the parent rate when adjustin  CPUX clock on A33 Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-12-13 17:00 +0100
  Re: [PATCH 2/6] clk: sunxi-ng: set the parent rate when adjustin  CPUX clock on A33 Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-12-14 10:40 +0100

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