Re: [PATCH v8 3/3] fpga: Add support for Lattice iCE40 FPGAs

From	Joel Holdsworth <joel@airwebreathe.org.uk>
Newsgroups	linux.kernel
Subject	Re: [PATCH v8 3/3] fpga: Add support for Lattice iCE40 FPGAs
Date	2016-11-09 20:00 +0100
Message-ID	<sBGgh-2DN-5@gated-at.bofh.it> (permalink)
References	(5 earlier) <sBi4i-3IU-9@gated-at.bofh.it> <sBixk-3SR-47@gated-at.bofh.it> <sBFDA-2qo-27@gated-at.bofh.it> <sBFWW-2xe-35@gated-at.bofh.it> <sBG6C-2AD-21@gated-at.bofh.it>
Organization	linux.* mail to news gateway

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On 09/11/16 11:39, Marek Vasut wrote:
> On 11/09/2016 07:37 PM, Joel Holdsworth wrote:
>> On 09/11/16 05:01, Marek Vasut wrote:
>>> On 11/08/2016 06:30 PM, Joel Holdsworth wrote:
>>>>>>> On the whole, I don't think the zero-length transfers are too
>>>>>>> egregiously bad, and all the alternatives seem worse to me.
>>>>>>
>>>>>> So why not turn the CS line into GPIO and just toggle the GPIO?
>>>>>
>>>>> Does that work with *all* SPI controllers?
>>>>>
>>>>
>>>> It does not - no. See my other email.
>>>
>>> And is that line an actual CS of that lattice chip or a generic input
>>> which almost works like CS?
>>>
>>
>> I mean a generic output vs. a special CS output built into the SPI
>> master of the application processor. Take a look at how spi_set_cs(..)
>> works:
>
> No. I am asking whether the signal which is INPUT on the iCE40 side is
> really a chipselect signal for the SPI bus OR something which mostly
> behaves/looks like a chipselect but is not really a chipselect.

Oh I see. The SS_B line is the SPI SlaveSelect for the configuration port.

This is the text from the datasheet:

"SPI Slave Select. Active Low. Includes an internal weak pull-up 
resistor to VCC_SPI during configuration. During configuration, the 
logic level sampled on this pin deter-mines the configuration mode used 
by the iCE40 device. An input when sampled at the start of 
configuration. An input when in SPI Peripheral configuration mode 
(SPI_SS_B = Low). An output when in Master SPI Flash configuration mode."

So yes - it is a "real" SPI chip-select line.

Joel

Thread

[PATCH v8 1/3] of: Add vendor prefix for Lattice Semiconductor Joel Holdsworth <joel@airwebreathe.org.uk> - 2016-11-07 04:00 +0100
  [PATCH v8 3/3] fpga: Add support for Lattice iCE40 FPGAs Joel Holdsworth <joel@airwebreathe.org.uk> - 2016-11-07 04:00 +0100
    Re: [PATCH v8 3/3] fpga: Add support for Lattice iCE40 FPGAs Moritz Fischer <moritz.fischer@ettus.com> - 2016-11-07 19:30 +0100
      Re: [PATCH v8 3/3] fpga: Add support for Lattice iCE40 FPGAs Joel Holdsworth <joel@airwebreathe.org.uk> - 2016-11-07 20:10 +0100
        Re: [PATCH v8 3/3] fpga: Add support for Lattice iCE40 FPGAs Moritz Fischer <moritz.fischer@ettus.com> - 2016-11-07 22:50 +0100
    Re: [PATCH v8 3/3] fpga: Add support for Lattice iCE40 FPGAs Marek Vasut <marex@denx.de> - 2016-11-07 19:30 +0100
      Re: [PATCH v8 3/3] fpga: Add support for Lattice iCE40 FPGAs Joel Holdsworth <joel@airwebreathe.org.uk> - 2016-11-07 20:00 +0100
        Re: [PATCH v8 3/3] fpga: Add support for Lattice iCE40 FPGAs Marek Vasut <marex@denx.de> - 2016-11-08 12:50 +0100
          Re: [PATCH v8 3/3] fpga: Add support for Lattice iCE40 FPGAs Moritz Fischer <moritz.fischer@ettus.com> - 2016-11-08 18:10 +0100
            Re: [PATCH v8 3/3] fpga: Add support for Lattice iCE40 FPGAs Joel Holdsworth <joel@airwebreathe.org.uk> - 2016-11-08 18:40 +0100
              Re: [PATCH v8 3/3] fpga: Add support for Lattice iCE40 FPGAs Marek Vasut <marex@denx.de> - 2016-11-09 19:20 +0100
                Re: [PATCH v8 3/3] fpga: Add support for Lattice iCE40 FPGAs Joel Holdsworth <joel@airwebreathe.org.uk> - 2016-11-09 19:40 +0100
                Re: [PATCH v8 3/3] fpga: Add support for Lattice iCE40 FPGAs Marek Vasut <marex@denx.de> - 2016-11-09 19:50 +0100
                Re: [PATCH v8 3/3] fpga: Add support for Lattice iCE40 FPGAs Joel Holdsworth <joel@airwebreathe.org.uk> - 2016-11-09 20:00 +0100
                Re: [PATCH v8 3/3] fpga: Add support for Lattice iCE40 FPGAs Marek Vasut <marex@denx.de> - 2016-11-10 18:00 +0100
          Re: [PATCH v8 3/3] fpga: Add support for Lattice iCE40 FPGAs Joel Holdsworth <joel@airwebreathe.org.uk> - 2016-11-08 18:20 +0100

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