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Re: [PATCH 02/12] pinctrl: Add core pinctrl support for Aspeed SoCs

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On Fri, Aug 12, 2016 at 2:33 AM, Andrew Jeffery <andrew@aj.id.au> wrote:

>> > +
>> > +       while (*exprs) {
>> > +               if (strncmp((*exprs)->signal, "GPIO", 4) == 0)
>> > +                       return true;
>> This looks a bit fragile and hard to debug. Do you have some better
>> idea of how to do this but not resort to string comparison?
>
> Yes, this is a little unfortunate. GPIO is not always a pin's lowest
> priority function (e.g. the RGMII/RMII pins), so this makes the GPIO
> case like any other mux function: We need to know when to stop
> iterating the arrays when disabling mux functions of higher priority.
> The alternative is probably to introduce another field to struct
> aspeed_sig_expr and set that as necessary, but that feels redundant if
> we keep to a consistent naming for the GPIOs.

I would probably prefer that option (introduce another field)
but you should make the overall decision, it's no strong opinion
from my side.

> Would it be acceptable to document that requirement?

Sure.

Yours,
Linus Walleij

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Re: [PATCH 02/12] pinctrl: Add core pinctrl support for Aspeed SoCs Linus Walleij <linus.walleij@linaro.org> - 2016-08-11 10:50 +0200
  Re: [PATCH 02/12] pinctrl: Add core pinctrl support for Aspeed SoCs Andrew Jeffery <andrew@aj.id.au> - 2016-08-12 02:40 +0200
    Re: [PATCH 02/12] pinctrl: Add core pinctrl support for Aspeed SoCs Linus Walleij <linus.walleij@linaro.org> - 2016-08-12 15:20 +0200
      Re: [PATCH 02/12] pinctrl: Add core pinctrl support for Aspeed SoCs Benjamin Herrenschmidt <benh@kernel.crashing.org> - 2016-08-13 03:40 +0200
        Re: [PATCH 02/12] pinctrl: Add core pinctrl support for Aspeed SoCs Andrew Jeffery <andrew@aj.id.au> - 2016-08-15 02:40 +0200

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