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Groups > linux.kernel > #1452961
| From | Xing Zheng <zhengxing@rock-chips.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | [PATCH 0/6] fix and optimize some clock configuration for the RK3399 platfom |
| Date | 2016-08-01 05:50 +0200 |
| Message-ID | <s1coN-Tv-3@gated-at.bofh.it> (permalink) |
| Organization | linux.* mail to news gateway |
Hi: In the development work, we found that some of the previous incorrect clock configuration on the RK3399 platform, we should fix and optimize them. Elaine Zhang (1): clk: rockchip: rk3399: delete the CLK_IGNORE_UNUSED for aclk_pcie Xing Zheng (5): clk: rockchip: rk3399: export USBPHYx_480M_SRC clock IDs clk: rockchip: rk3399: export 480M_SRC clock id for usbphy0/usbphy1 clk: rockchip: rk3399: fix incorrect aclk_emmc source gate bits clk: rockchip: rk3399: add 65MHz and 106.5MHz clocks for HDMI clk: rockchip: rk3399: Add support frac mode frequencies drivers/clk/rockchip/clk-rk3399.c | 35 +++++++++++++++++++++++++------- include/dt-bindings/clock/rk3399-cru.h | 2 ++ 2 files changed, 30 insertions(+), 7 deletions(-) -- 1.7.9.5
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[PATCH 0/6] fix and optimize some clock configuration for the RK3399 platfom Xing Zheng <zhengxing@rock-chips.com> - 2016-08-01 05:50 +0200 [PATCH 2/6] clk: rockchip: rk3399: export 480M_SRC clock id for usbphy0/usbphy1 Xing Zheng <zhengxing@rock-chips.com> - 2016-08-01 05:50 +0200 [PATCH 1/6] clk: rockchip: rk3399: export USBPHYx_480M_SRC clock IDs Xing Zheng <zhengxing@rock-chips.com> - 2016-08-01 05:50 +0200 [PATCH 4/6] clk: rockchip: rk3399: add 65MHz and 106.5MHz clocks for HDMI Xing Zheng <zhengxing@rock-chips.com> - 2016-08-01 05:50 +0200 [PATCH 3/6] clk: rockchip: rk3399: fix incorrect aclk_emmc source gate bits Xing Zheng <zhengxing@rock-chips.com> - 2016-08-01 05:50 +0200 [PATCH 5/6] clk: rockchip: rk3399: delete the CLK_IGNORE_UNUSED for aclk_pcie Xing Zheng <zhengxing@rock-chips.com> - 2016-08-01 06:00 +0200
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