Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]

Groups > linux.kernel > #1388914

Re: [PATCH V4 16/18] coresight: tmc: implementing TMC-ETF AUX space API

Show all headers | View raw

On 26/04/16 23:10, Mathieu Poirier wrote:
> This patch implement the AUX area interfaces required to
> use the TMC (configured as an ETF) from the Perf sub-system.
>
> The heuristic is heavily borrowed from the ETB10 implementation.
>
> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>

> +
> +		/*
> +		 * Make sure the new size is aligned in accordance with the
> +		 * requirement explained above.
> +		 */
> +		to_read = handle->size & mask;
> +		/* Move the RAM read pointer up */
> +		read_ptr = (write_ptr + drvdata->size) - to_read;
> +		/* Make sure we are still within our limits */
> +		read_ptr &= ~(drvdata->size - 1);

Correct me if I am wrong, I think this will break for ETR configuration (used from the following
patch 17/18). Since, for ETR, RRP/RWP will return the lower 32bit AXI address (not the queue offset).
So the last step would really spoil the read_ptr. We might have to set the read_ptr by adding the
appropriate offset from DBAL0.

Suzuki

Back to linux.kernel | Previous | Next — Previous in thread | Next in thread | Find similar | Unroll thread

Thread

[PATCH V4 00/18] coresight: tmc: make driver usable by Perf Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-04-27 00:20 +0200
  [PATCH V4 09/18] coresight: tmc: allocating memory when needed Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-04-27 00:20 +0200
  [PATCH V4 14/18] coresight: tmc: keep track of memory width Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-04-27 00:20 +0200
  [PATCH V4 15/18] coresight: moving struct cs_buffers to header file Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-04-27 00:20 +0200
  [PATCH V4 04/18] coresight: tmc: clearly define number of transfers per burst Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-04-27 00:20 +0200
  [PATCH V4 16/18] coresight: tmc: implementing TMC-ETF AUX space API Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-04-27 00:20 +0200
    Re: [PATCH V4 16/18] coresight: tmc: implementing TMC-ETF AUX space  API Suzuki K Poulose <Suzuki.Poulose@arm.com> - 2016-04-27 13:30 +0200
      Re: [PATCH V4 16/18] coresight: tmc: implementing TMC-ETF AUX space  API Suzuki K Poulose <Suzuki.Poulose@arm.com> - 2016-04-27 19:30 +0200
      Re: [PATCH V4 16/18] coresight: tmc: implementing TMC-ETF AUX space API Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-04-27 19:30 +0200
  [PATCH V4 11/18] coresight: tmc: adding mode of operation for link/sinks Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-04-27 00:20 +0200
    Re: [PATCH V4 11/18] coresight: tmc: adding mode of operation for  link/sinks Suzuki K Poulose <Suzuki.Poulose@arm.com> - 2016-04-27 11:10 +0200
  [PATCH V4 02/18] coresight: tmc: waiting for TMCReady bit before programming Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-04-27 00:20 +0200
  [PATCH V4 10/18] coresight: tmc: getting rid of multiple read access Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-04-27 00:20 +0200
    Re: [PATCH V4 10/18] coresight: tmc: getting rid of multiple read  access Suzuki K Poulose <Suzuki.Poulose@arm.com> - 2016-04-27 11:00 +0200
  [PATCH V4 05/18] coresight: tmc: introducing new header file Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-04-27 00:20 +0200
  [PATCH V4 08/18] coresight: tmc: making prepare/unprepare functions generic Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-04-27 00:20 +0200
  [PATCH V4 18/18] coresight: configuring ETF in FIFO mode when acting as link Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-04-27 00:20 +0200
  [PATCH V4 06/18] coresight: tmc: cleaning up header file Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-04-27 00:20 +0200

csiph-web