Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]


Groups > linux.kernel > #1384824

Re: [PATCH v1 2/5] perf/x86/intel/pt: IP filtering register/cpuid bits

From Borislav Petkov <bp@alien8.de>
Newsgroups linux.kernel
Subject Re: [PATCH v1 2/5] perf/x86/intel/pt: IP filtering register/cpuid bits
Date 2016-04-22 11:40 +0200
Message-ID <rqFJ9-8d9-23@gated-at.bofh.it> (permalink)
References (1 earlier) <rqoRY-2Wv-27@gated-at.bofh.it> <rqqTM-4ry-3@gated-at.bofh.it> <rqrZv-5rZ-3@gated-at.bofh.it> <rqtyi-6T4-1@gated-at.bofh.it> <rqEk2-7fW-17@gated-at.bofh.it>
Organization linux.* mail to news gateway

Show all headers | View raw


On Fri, Apr 22, 2016 at 09:58:31AM +0200, Thomas Gleixner wrote:
> That's really not the same thing. pci ids are issued by a gazillion of vendors
> for a bazillion of different devices. There is no consistent view for them.

So my reasoning was to not add *every* MSR to that file, especially the
ones which are strictly topical. For example, the MCA MSRs which can
easily live in mce.h as nothing else needs to touch them...

> MSRs on the other hand are x86 specific registers nicely defined in the
> SDM/APM and having at least the MSR defines in a single header makes a lot of
> sense.

... but ok. I see there could be some merit of keeping them all in the
same place. We can always change that if the handling of msr-index.h
starts becoming too unwieldy.

In any case, we'd need to zap

053080a9d1c8 ("x86/msr: Document msr-index.h rule for addition")

now.

-- 
Regards/Gruss,
    Boris.

ECO tip #101: Trim your mails when you reply.

Back to linux.kernel | Previous | NextPrevious in thread | Find similar | Unroll thread


Thread

[PATCH v1 2/5] perf/x86/intel/pt: IP filtering register/cpuid bits Alexander Shishkin <alexander.shishkin@linux.intel.com> - 2016-04-21 17:40 +0200
  Re: [PATCH v1 2/5] perf/x86/intel/pt: IP filtering register/cpuid  bits Borislav Petkov <bp@alien8.de> - 2016-04-21 19:50 +0200
    Re: [PATCH v1 2/5] perf/x86/intel/pt: IP filtering register/cpuid  bits Thomas Gleixner <tglx@linutronix.de> - 2016-04-21 21:00 +0200
      Re: [PATCH v1 2/5] perf/x86/intel/pt: IP filtering register/cpuid  bits Peter Zijlstra <peterz@infradead.org> - 2016-04-21 21:20 +0200
        Re: [PATCH v1 2/5] perf/x86/intel/pt: IP filtering register/cpuid  bits Borislav Petkov <bp@alien8.de> - 2016-04-21 22:50 +0200
      Re: [PATCH v1 2/5] perf/x86/intel/pt: IP filtering register/cpuid  bits Borislav Petkov <bp@alien8.de> - 2016-04-21 22:40 +0200
        Re: [PATCH v1 2/5] perf/x86/intel/pt: IP filtering register/cpuid  bits Thomas Gleixner <tglx@linutronix.de> - 2016-04-22 10:10 +0200
          Re: [PATCH v1 2/5] perf/x86/intel/pt: IP filtering register/cpuid  bits Borislav Petkov <bp@alien8.de> - 2016-04-22 11:40 +0200

csiph-web