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| Path | csiph.com!eternal-september.org!feeder.eternal-september.org!aioe.org!bofh.it!news.nic.it!robomod |
|---|---|
| From | Marc Zyngier <marc.zyngier@arm.com> |
| Newsgroups | linux.kernel |
| Subject | Re: [PATCH 2/2 v5] irqchip/Layerscape: Add SCFG MSI controller support |
| Date | Fri, 22 Apr 2016 09:50:02 +0200 |
| Message-ID | <rqE0G-6O2-19@gated-at.bofh.it> (permalink) |
| References | <ra07g-1aG-11@gated-at.bofh.it> <ra07g-1aG-13@gated-at.bofh.it> <ra07g-1aG-9@gated-at.bofh.it> <rqBYR-5ad-3@gated-at.bofh.it> |
| X-Original-To | Leo Li <pku.leo@gmail.com> |
| Organization | ARM Ltd |
| User-Agent | Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Icedove/38.7.0 |
| MIME-Version | 1.0 |
| Content-Type | text/plain; charset=utf-8 |
| Content-Transfer-Encoding | 7bit |
| Sender | robomod@news.nic.it |
| List-ID | <linux-kernel.vger.kernel.org> |
| X-Mailing-List | linux-kernel@vger.kernel.org |
| Approved | robomod@news.nic.it |
| Lines | 29 |
| X-Original-Cc | Minghuan Lian <Minghuan.Lian@nxp.com>, "linux-arm-kernel@lists.infradead.org" <linux-arm-kernel@lists.infradead.org>, lkml <linux-kernel@vger.kernel.org>, Thomas Gleixner <tglx@linutronix.de>, Jason Cooper <jason@lakedaemon.net>, Roy Zang <roy.zang@nxp.com>, Mingkai Hu <mingkai.hu@nxp.com>, Stuart Yoder <stuart.yoder@nxp.com>, Yang-Leo Li <leoyang.li@nxp.com>, Rob Herring <robh+dt@kernel.org>, Mark Rutland <Mark.Rutland@arm.com> |
| X-Original-Date | Fri, 22 Apr 2016 08:43:16 +0100 |
| X-Original-Message-ID | <5719D614.1080400@arm.com> |
| X-Original-References | <1457321782-3245-1-git-send-email-Minghuan.Lian@nxp.com> <1457321782-3245-2-git-send-email-Minghuan.Lian@nxp.com> <20160307095021.7f9f7484@arm.com> <CADRPPNRU=qy34p4hzYvzBPrt2uabSQfc0Xdd8K5v5B_JW01QJA@mail.gmail.com> |
| X-Original-Sender | linux-kernel-owner@vger.kernel.org |
| Xref | csiph.com linux.kernel:1384750 |
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On 22/04/16 06:33, Leo Li wrote: > On Mon, Mar 7, 2016 at 3:50 AM, Marc Zyngier <marc.zyngier@arm.com> wrote: >> On Mon, 7 Mar 2016 11:36:22 +0800 >> Minghuan Lian <Minghuan.Lian@nxp.com> wrote: >> >>> Some kind of NXP Layerscape SoC provides a MSI >>> implementation which uses two SCFG registers MSIIR and >>> MSIR to support 32 MSI interrupts for each PCIe controller. >>> The patch is to support it. >>> >>> Signed-off-by: Minghuan Lian <Minghuan.Lian@nxp.com> >> >> Acked-by: Marc Zyngier <marc.zyngier@arm.com> >> >> The DT binding still needs an Ack from the DT maintainers though (cc'd). > > Marc, > > Who will be responsible to pick this driver? I see you are also one > of the maintainers for irqchip. Can you pick up the driver? The > binding has already gotten ACKed by the device tree maintainer. Can you point me to this Ack? I can't see any trace of it in my Inbox. Thanks, M. -- Jazz is not dead. It just smells funny...
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Re: [PATCH 2/2 v5] irqchip/Layerscape: Add SCFG MSI controller support Leo Li <pku.leo@gmail.com> - 2016-04-22 07:40 +0200
Re: [PATCH 2/2 v5] irqchip/Layerscape: Add SCFG MSI controller support Marc Zyngier <marc.zyngier@arm.com> - 2016-04-22 09:50 +0200
RE: [PATCH 2/2 v5] irqchip/Layerscape: Add SCFG MSI controller support Minghuan Lian <minghuan.lian@nxp.com> - 2016-04-22 10:00 +0200
Re: [PATCH 2/2 v5] irqchip/Layerscape: Add SCFG MSI controller support Marc Zyngier <marc.zyngier@arm.com> - 2016-04-22 10:00 +0200
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