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Re: [PATCH v8 3/3] irqchip: add nps Internal and external irqchips

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On Monday 11 April 2016 06:23 PM, Marc Zyngier wrote:
> On 03/04/16 19:14, Noam Camus wrote:
>> From: Noam Camus <noamc@ezchip.com>
>>
>> Adding EZchip NPS400 support.
>> Internal interrupts are handled by Multi Thread Manager (MTM)
>> Once interrupt is serviced MTM is acked for deactivating the interrupt.
>> External interrupts are handled by MTM as well as at Global Interrupt
>> Controller (GIC) e.g. serial and network devices.
>>
>> Signed-off-by: Noam Camus <noamc@ezchip.com>
>> Cc: Thomas Gleixner <tglx@linutronix.de>
>> Cc: Jason Cooper <jason@lakedaemon.net>
>> Cc: Marc Zyngier <marc.zyngier@arm.com>
>> Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
> Acked-by: Marc Zyngier <marc.zyngier@arm.com>

Thx Marc.

Thomas, how do you prefer to merge this for 4.7. There is a dependency on a soc
header. Are you OK if I take the series via ARC tree.

-Vineet

>
> 	M.

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Re: [PATCH v8 3/3] irqchip: add nps Internal and external irqchips Marc Zyngier <marc.zyngier@arm.com> - 2016-04-11 15:00 +0200
  Re: [PATCH v8 3/3] irqchip: add nps Internal and external irqchips Vineet Gupta <Vineet.Gupta1@synopsys.com> - 2016-04-11 15:40 +0200
    Re: [PATCH v8 3/3] irqchip: add nps Internal and external irqchips Jason Cooper <jason@lakedaemon.net> - 2016-04-11 15:50 +0200
  Re: [PATCH v8 3/3] irqchip: add nps Internal and external irqchips Vineet Gupta <Vineet.Gupta1@synopsys.com> - 2016-04-11 16:20 +0200
    Re: [PATCH v8 3/3] irqchip: add nps Internal and external irqchips Marc Zyngier <marc.zyngier@arm.com> - 2016-04-11 16:50 +0200

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