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Re: [PATCH v4 3/6] pinctrl: baytrail: Update gpio chip operations

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On Fri, Apr 1, 2016 at 1:00 PM, Cristina Ciocan
<cristina.ciocan@intel.com> wrote:

> This patch updates the gpio chip implementation in order to interact with
> the pin control model: the chip contains reference to SOC data and
> pin/group/community information is retrieved through the SOC reference.
>
> Signed-off-by: Cristina Ciocan <cristina.ciocan@intel.com>

Patch applied with Mika's ACK.

Cristina & Mika, can you provide feedback on a patch I sent last week:
http://marc.info/?l=linux-gpio&m=145864063724362&w=2

This makes it possible for a GPIO driver to use native
open drain if the hardware supports this instead of relying
on switching the pin to input and thus expecting high impedance.

With a backing pin control driver I think that maybe we need
a pin control back-end performing things like this on behalf
of the GPIO driver, something like
pinctrl_gpio_set_config(unsigned gpio, enum pin_config_param param,
u16 argument);

So the pin controller can perform config on behalf of the
GPIO driver (e.g. setting a backing pin to open drain).

Do you think we will need this?

Yours,
Linus Walleij

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Re: [PATCH v4 3/6] pinctrl: baytrail: Update gpio chip operations Linus Walleij <linus.walleij@linaro.org> - 2016-04-04 16:10 +0200
  Re: [PATCH v4 3/6] pinctrl: baytrail: Update gpio chip operations Mika Westerberg <mika.westerberg@linux.intel.com> - 2016-04-05 10:50 +0200
    Re: [PATCH v4 3/6] pinctrl: baytrail: Update gpio chip operations Cristina Ciocan <cristina.ciocan@intel.com> - 2016-04-05 11:20 +0200

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