Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]

Groups > linux.kernel > #1370638

Re: [PATCH v4 1/6] pinctrl: baytrail: Add pin control data structures

Show all headers | View raw

On Fri, Apr 1, 2016 at 1:00 PM, Cristina Ciocan
<cristina.ciocan@intel.com> wrote:

> In order to implement pin control for Baytrail, we need data structures
> in which to store and pass along pin, group, function, community and SOC
> data information.
>
> Baytrail has 3 GPIO controllers. Add SCORE, NCORE and SUS controller data:
>         - pins (for all controllers),
>         - pad map for pins (for all controllers; we need this since pads
>         are not ordered),
>         - groups (for SCORE and SUS controllers),
>         - functions (for SCORE and SUS controllers),
>         - communities (for all controllers),
>         - soc specific data gathering all of the above and the ACPI UID
>         (for all controllers)
> This information is useful for pin control functionality. NCORE data is
> lighter than the other two controllers' due to lack of pin documentation in
> the public datasheet.
>
> Datasheet:
> http://www.intel.com/content/www/us/en/embedded/products/bay-trail/atom-e3800-family-datasheet.html
>
> Signed-off-by: Cristina Ciocan <cristina.ciocan@intel.com>

Patch applied with Mika's ACK.

Yours,
Linus Walleij

Back to linux.kernel | Previous | Next | Find similar | Unroll thread

Thread

Re: [PATCH v4 1/6] pinctrl: baytrail: Add pin control data structures Linus Walleij <linus.walleij@linaro.org> - 2016-04-04 16:00 +0200

csiph-web