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Groups > linux.kernel > #1363534
| From | Maxime Ripard <maxime.ripard@free-electrons.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | [PATCH v3 16/19] drm: sun4i: tv: Add PAL output standard |
| Date | 2016-03-23 17:50 +0100 |
| Message-ID | <rfU8O-6dp-3@gated-at.bofh.it> (permalink) |
| References | <rfTZ8-69G-21@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
Now that we have support for the composite output, we can start adding new
supported standards. Start with PAL, and we will add other eventually.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
drivers/gpu/drm/sun4i/sun4i_tv.c | 42 ++++++++++++++++++++++++++++++++++++++++
1 file changed, 42 insertions(+)
diff --git a/drivers/gpu/drm/sun4i/sun4i_tv.c b/drivers/gpu/drm/sun4i/sun4i_tv.c
index 78634dfc0f77..ccf275a90132 100644
--- a/drivers/gpu/drm/sun4i/sun4i_tv.c
+++ b/drivers/gpu/drm/sun4i/sun4i_tv.c
@@ -178,7 +178,49 @@ struct sun4i_tv {
struct sun4i_drv *drv;
};
+struct video_levels pal_video_levels = {
+ .black = 252, .blank = 252,
+};
+
+struct burst_levels pal_burst_levels = {
+ .cb = 40, .cr = 40,
+};
+
+struct color_gains pal_color_gains = {
+ .cb = 224, .cr = 224,
+};
+
+struct resync_parameters pal_resync_parameters = {
+ .field = true, .line = 13, .pixel = 12,
+};
+
struct tv_mode tv_modes[] = {
+ {
+ .name = "PAL",
+ .mode = SUN4I_TVE_CFG0_RES_576i,
+ .chroma_freq = 0x2a098acb,
+
+ .back_porch = 138,
+ .front_porch = 24,
+ .line_number = 625,
+
+ .hdisplay = 720,
+ .hfront_porch = 3,
+ .hsync_len = 2,
+ .hback_porch = 139,
+
+ .vdisplay = 576,
+ .vfront_porch = 28,
+ .vsync_len = 2,
+ .vback_porch = 19,
+
+ .vblank_level = 252,
+
+ .color_gains = &pal_color_gains,
+ .burst_levels = &pal_burst_levels,
+ .video_levels = &pal_video_levels,
+ .resync_params = &pal_resync_parameters,
+ },
};
static inline struct sun4i_tv *
--
2.7.3
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[PATCH v3 00/19] drm: Add Allwinner A10 display engine support Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-03-23 17:50 +0100
[PATCH v3 16/19] drm: sun4i: tv: Add PAL output standard Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-03-23 17:50 +0100
[PATCH v3 02/19] clk: sunxi: Add display and TCON0 clocks driver Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-03-23 17:50 +0100
[PATCH v3 06/19] ARM: sun5i: dt: Add pll3 and pll7 clocks Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-03-23 17:50 +0100
[PATCH v3 07/19] ARM: sun5i: a13: Add display and TCON clocks Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-03-23 17:50 +0100
[PATCH v3 05/19] dt-bindings: clk: sun5i: add DRAM gates compatible Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-03-23 17:50 +0100
[PATCH v3 15/19] drm: sun4i: Add composite output Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-03-23 17:50 +0100
[PATCH v3 19/19] ARM: sun5i: chip: Enable the TV Encoder Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-03-23 17:50 +0100
[PATCH v3 08/19] ARM: sun5i: Add DRAM gates Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-03-23 17:50 +0100
Re: [linux-sunxi] [PATCH v3 08/19] ARM: sun5i: Add DRAM gates Chen-Yu Tsai <wens@csie.org> - 2016-03-24 05:40 +0100
Re: [linux-sunxi] [PATCH v3 08/19] ARM: sun5i: Add DRAM gates Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-03-29 12:10 +0200
[PATCH v3 18/19] ARM: sun5i: r8: Add display blocks to the DTSI Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-03-23 17:50 +0100
[PATCH v3 10/19] drm: fb: Add seq_file definition Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-03-23 17:50 +0100
[PATCH v3 01/19] clk: composite: Add unregister function Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-03-23 17:50 +0100
[PATCH v3 17/19] drm: sun4i: tv: Add NTSC output standard Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-03-23 17:50 +0100
[PATCH v3 04/19] clk: sunxi: Add TCON channel1 clock Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-03-23 17:50 +0100
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