Re: [PATCHv3 6/9] Documentation: dt: socfpga: Add Altera Arria10 L2 cache binding

From	Rob Herring <robh@kernel.org>
Newsgroups	linux.kernel
Subject	Re: [PATCHv3 6/9] Documentation: dt: socfpga: Add Altera Arria10 L2 cache binding
Date	2016-03-23 15:30 +0100
Message-ID	<rfRXk-4FL-11@gated-at.bofh.it> (permalink)
References	<rfRXk-4FL-13@gated-at.bofh.it> <rfRXk-4FL-15@gated-at.bofh.it>
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On Mon, Mar 21, 2016 at 11:01:43AM -0500, tthayer@opensource.altera.com wrote:
> From: Thor Thayer <tthayer@opensource.altera.com>
> 
> Add the device tree bindings needed to support the Altera L2
> cache on the Arria10 chip. Since all the peripherals share
> IRQs, the IRQ fields are now in the ecc_manager.
> 
> Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
> ---
> v2 Correct spelling of Arria10 in patch title.
> v3 Major restructuring change for ecc_manager to include IRQs
> ---
>  .../bindings/arm/altera/socfpga-eccmgr.txt         |   40 ++++++++++++++++++++
>  1 file changed, 40 insertions(+)

Acked-by: Rob Herring <robh@kernel.org>

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Re: [PATCHv3 6/9] Documentation: dt: socfpga: Add Altera Arria10 L2  cache binding Rob Herring <robh@kernel.org> - 2016-03-23 15:30 +0100

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