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Re: [PATCH] staging: rtl8712: Fixed Multiple Parenthesis Alignment

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On Sun, 2016-03-20 at 14:33 +0000, Parth Sane wrote:
> Fixed multiple parenthesis alignment warnings.
> Signed-off-by: Parth Sane <laerdevstudios@gmail.com>

Please always add a blank line after your changelog and
before your "Signed-off-by:" line

> diff --git a/drivers/staging/rtl8712/hal_init.c b/drivers/staging/rtl8712/hal_init.c
[]
> @@ -197,7 +197,7 @@ static u8 rtl8712_dl_fw(struct _adapter *padapter)
>  						       0x0000ffff);
>  			memcpy(ppayload, ptr, dump_imem_sz);
>  			r8712_write_mem(padapter, RTL8712_DMA_VOQ,
> -				  dump_imem_sz + TXDESC_SIZE,
> +					dump_imem_sz + TXDESC_SIZE,
>  				  (u8 *)ptx_desc);

Please align all lines of multi-line statements.

checkpatch is a stupid little script.
You have to make sure your own patches are sensible.

There are several things you should read and
understand in the Documentation directory.

	Documentation/CodingStyle
	Documentation/SubmittingPatches
	Documentation/SubmitChecklist

Fixing checkpatch messages is sometimes a decent
way to understand this process, but the patches
that can be generated fixing these messages tend
to have low overall value.

After doing a few of these, please move on to
some part of the kernel that interests you and
submit new code or start to fix actual defects.

Maybe if you are interested in wireless drivers,
buy a NIC that isn't supported by the mac80211
drivers and adapt the existing staging driver for
that variant.

Code, test, validate, submit, repeat...

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[PATCH] staging: rtl8712: Fixed Multiple Parenthesis Alignment Parth Sane <laerdevstudios@gmail.com> - 2016-03-20 15:40 +0100
  Re: [PATCH] staging: rtl8712: Fixed Multiple Parenthesis Alignment Joe Perches <joe@perches.com> - 2016-03-20 16:50 +0100
    Re: [PATCH] staging: rtl8712: Fixed Multiple Parenthesis Alignment Parth Sane <laerdevstudios@gmail.com> - 2016-03-20 17:00 +0100
      Re: [PATCH] staging: rtl8712: Fixed Multiple Parenthesis Alignment Parth Sane <laerdevstudios@gmail.com> - 2016-03-20 17:50 +0100

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