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Re: [PATCH V2 03/10] Documentation: dt-bindings: firmware: tegra: add bindings of the BPMP

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On 07/06/2016 07:42 PM, Alexandre Courbot wrote:
> On Tue, Jul 5, 2016 at 6:04 PM, Joseph Lo <josephl@nvidia.com> wrote:
>> The BPMP is a specific processor in Tegra chip, which is designed for
>> booting process handling and offloading the power management, clock
>> management, and reset control tasks from the CPU. The binding document
>> defines the resources that would be used by the BPMP firmware driver,
>> which can create the interprocessor communication (IPC) between the CPU
>> and BPMP.
>>
>> Signed-off-by: Joseph Lo <josephl@nvidia.com>
>> ---
>> Changes in V2:
>> - update the message that the BPMP is clock and reset control provider
>> - add tegra186-clock.h and tegra186-reset.h header files
>> - revise the description of the required properties
>> ---
>>   .../bindings/firmware/nvidia,tegra186-bpmp.txt     |  77 ++
>>   include/dt-bindings/clock/tegra186-clock.h         | 940 +++++++++++++++++++++
>>   include/dt-bindings/reset/tegra186-reset.h         | 217 +++++
>>   3 files changed, 1234 insertions(+)
>>   create mode 100644 Documentation/devicetree/bindings/firmware/nvidia,tegra186-bpmp.txt
>>   create mode 100644 include/dt-bindings/clock/tegra186-clock.h
>>   create mode 100644 include/dt-bindings/reset/tegra186-reset.h
>>
>> diff --git a/Documentation/devicetree/bindings/firmware/nvidia,tegra186-bpmp.txt b/Documentation/devicetree/bindings/firmware/nvidia,tegra186-bpmp.txt
>> new file mode 100644
>> index 000000000000..4d0b6eba56c5
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/firmware/nvidia,tegra186-bpmp.txt
>> @@ -0,0 +1,77 @@
>> +NVIDIA Tegra Boot and Power Management Processor (BPMP)
>> +
>> +The BPMP is a specific processor in Tegra chip, which is designed for
>> +booting process handling and offloading the power management, clock
>> +management, and reset control tasks from the CPU. The binding document
>> +defines the resources that would be used by the BPMP firmware driver,
>> +which can create the interprocessor communication (IPC) between the CPU
>> +and BPMP.
>> +
>> +Required properties:
>> +- name : Should be bpmp
>> +- compatible
>> +    Array of strings
>> +    One of:
>> +    - "nvidia,tegra186-bpmp"
>> +- mboxes : The phandle of mailbox controller and the mailbox specifier.
>> +- shmem : List of the phandle of the TX and RX shared memory area that
>> +         the IPC between CPU and BPMP is based on.
>> +- #clock-cells : Should be 1.
>> +- #reset-cells : Should be 1.
>> +
>> +This node is a mailbox consumer. See the following files for details of
>> +the mailbox subsystem, and the specifiers implemented by the relevant
>> +provider(s):
>> +
>> +- Documentation/devicetree/bindings/mailbox/mailbox.txt
>> +- Documentation/devicetree/bindings/mailbox/nvidia,tegra186-hsp.txt
>> +
>> +This node is a clock and reset provider. See the following files for
>> +general documentation of those features, and the specifiers implemented
>> +by this node:
>> +
>> +- Documentation/devicetree/bindings/clock/clock-bindings.txt
>> +- include/dt-bindings/clock/tegra186-clock.h
>> +- Documentation/devicetree/bindings/reset/reset.txt
>> +- include/dt-bindings/reset/tegra186-reset.h
>> +
>> +The shared memory bindings for BPMP
>> +-----------------------------------
>> +
>> +The shared memory area for the IPC TX and RX between CPU and BPMP are
>> +predefined and work on top of sysram, which is an SRAM inside the chip.
>> +
>> +See "Documentation/devicetree/bindings/sram/sram.txt" for the bindings.
>> +
>> +Example:
>> +
>> +hsp_top0: hsp@03c00000 {
>> +       ...
>> +       #mbox-cells = <1>;
>> +};
>> +
>> +sysram@30000000 {
>> +       compatible = "nvidia,tegra186-sysram", "mmio-ram";
>
> Shouldn't the second compatible be "mmio-sram"?
>
> If so, then you have the same typo in tegra186.dtsi as well.
>

Good catch, will fix.

Thanks,
-Joseph

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[PATCH V2 00/10] arm64: tegra: add BPMP support Joseph Lo <josephl@nvidia.com> - 2016-07-05 11:10 +0200
  [PATCH V2 02/10] mailbox: tegra-hsp: Add HSP(Hardware Synchronization Primitives) driver Joseph Lo <josephl@nvidia.com> - 2016-07-05 11:10 +0200
    Re: [PATCH V2 02/10] mailbox: tegra-hsp: Add HSP(Hardware  Synchronization Primitives) driver Alexandre Courbot <gnurou@gmail.com> - 2016-07-06 09:10 +0200
      Re: [PATCH V2 02/10] mailbox: tegra-hsp: Add HSP(Hardware  Synchronization Primitives) driver Joseph Lo <josephl@nvidia.com> - 2016-07-06 11:10 +0200
        Re: [PATCH V2 02/10] mailbox: tegra-hsp: Add HSP(Hardware  Synchronization Primitives) driver Alexandre Courbot <gnurou@gmail.com> - 2016-07-06 14:30 +0200
          Re: [PATCH V2 02/10] mailbox: tegra-hsp: Add HSP(Hardware  Synchronization Primitives) driver Joseph Lo <josephl@nvidia.com> - 2016-07-07 08:40 +0200
            Re: [PATCH V2 02/10] mailbox: tegra-hsp: Add HSP(Hardware  Synchronization Primitives) driver Sivaram Nair <sivaramn@nvidia.com> - 2016-07-07 23:40 +0200
        Re: [PATCH V2 02/10] mailbox: tegra-hsp: Add HSP(Hardware  Synchronization Primitives) driver Stephen Warren <swarren@wwwdotorg.org> - 2016-07-06 19:00 +0200
          Re: [PATCH V2 02/10] mailbox: tegra-hsp: Add HSP(Hardware  Synchronization Primitives) driver Joseph Lo <josephl@nvidia.com> - 2016-07-07 08:50 +0200
    Re: [PATCH V2 02/10] mailbox: tegra-hsp: Add HSP(Hardware  Synchronization Primitives) driver Sivaram Nair <sivaramn@nvidia.com> - 2016-07-07 23:20 +0200
  [PATCH V2 07/10] arm64: defconfig: Enable Tegra186 SoC Joseph Lo <josephl@nvidia.com> - 2016-07-05 11:10 +0200
  [PATCH V2 09/10] arm64: dts: tegra: Add NVIDIA Tegra186 P3310 main board support Joseph Lo <josephl@nvidia.com> - 2016-07-05 11:10 +0200
  [PATCH V2 10/10] arm64: dts: tegra: Add NVIDIA P2771 board support Joseph Lo <josephl@nvidia.com> - 2016-07-05 11:10 +0200
  [PATCH V2 04/10] firmware: tegra: add IVC library Joseph Lo <josephl@nvidia.com> - 2016-07-05 11:10 +0200
    Re: [PATCH V2 04/10] firmware: tegra: add IVC library Alexandre Courbot <gnurou@gmail.com> - 2016-07-07 13:20 +0200
    Re: [PATCH V2 04/10] firmware: tegra: add IVC library Paul Gortmaker <paul.gortmaker@windriver.com> - 2016-07-10 01:50 +0200
  [PATCH V2 08/10] arm64: dts: tegra: Add Tegra186 support Joseph Lo <josephl@nvidia.com> - 2016-07-05 11:10 +0200
  [PATCH V2 06/10] soc/tegra: Add Tegra186 support Joseph Lo <josephl@nvidia.com> - 2016-07-05 11:10 +0200
  Re: [PATCH V2 03/10] Documentation: dt-bindings: firmware: tegra: add  bindings of the BPMP Alexandre Courbot <gnurou@gmail.com> - 2016-07-06 13:50 +0200
    Re: [PATCH V2 03/10] Documentation: dt-bindings: firmware: tegra: add  bindings of the BPMP Joseph Lo <josephl@nvidia.com> - 2016-07-07 08:30 +0200
  Re: [PATCH V2 05/10] firmware: tegra: add BPMP support Alexandre Courbot <gnurou@gmail.com> - 2016-07-06 14:00 +0200
    Re: [PATCH V2 05/10] firmware: tegra: add BPMP support Stephen Warren <swarren@wwwdotorg.org> - 2016-07-06 18:50 +0200
    Re: [PATCH V2 05/10] firmware: tegra: add BPMP support Matt Longnecker <mlongnecker@nvidia.com> - 2016-07-06 18:50 +0200
      Re: [PATCH V2 05/10] firmware: tegra: add BPMP support Alexandre Courbot <gnurou@gmail.com> - 2016-07-07 04:30 +0200
    Re: [PATCH V2 05/10] firmware: tegra: add BPMP support Joseph Lo <josephl@nvidia.com> - 2016-07-07 10:20 +0200
      Re: [PATCH V2 05/10] firmware: tegra: add BPMP support Alexandre Courbot <gnurou@gmail.com> - 2016-07-07 12:20 +0200
        Re: [PATCH V2 05/10] firmware: tegra: add BPMP support Stephen Warren <swarren@wwwdotorg.org> - 2016-07-07 22:00 +0200
        Re: [PATCH V2 05/10] firmware: tegra: add BPMP support Sivaram Nair <sivaramn@nvidia.com> - 2016-07-08 22:30 +0200
  Re: [PATCH V2 03/10] Documentation: dt-bindings: firmware: tegra: add  bindings of the BPMP Stephen Warren <swarren@wwwdotorg.org> - 2016-07-06 19:10 +0200
    Re: [PATCH V2 03/10] Documentation: dt-bindings: firmware: tegra: add  bindings of the BPMP Joseph Lo <josephl@nvidia.com> - 2016-07-07 08:30 +0200

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