[PATCH net-next 01/19] net: hns: bug fix of ge reset sequence

From	Yisen Zhuang <Yisen.Zhuang@huawei.com>
Newsgroups	linux.kernel
Subject	[PATCH net-next 01/19] net: hns: bug fix of ge reset sequence
Date	2016-06-21 05:50 +0200
Message-ID	<rMkRj-qs-3@gated-at.bofh.it> (permalink)
References	<rMkHD-l2-5@gated-at.bofh.it>
Organization	linux.* mail to news gateway

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From: Qianqian Xie <xieqianqian@huawei.com>

The bit fileds of PPE reset register are different between HNS v1 and
HNS v2, but the current procedure just only match HNS v1. Here is a
patch to fix it.

Signed-off-by: Kejian Yan <yankejian@huawei.com>
Signed-off-by: Qianqian Xie <xieqianqian@huawei.com>
Signed-off-by: Yisen Zhuang <Yisen.Zhuang@huawei.com>
---
 drivers/net/ethernet/hisilicon/hns/hns_dsaf_misc.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_misc.c b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_misc.c
index 96cb628..09e60d6 100644
--- a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_misc.c
+++ b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_misc.c
@@ -271,7 +271,11 @@ static void hns_dsaf_ge_srst_by_port(struct dsaf_device *dsaf_dev, u32 port,
 		}
 	} else {
 		reg_val_1 = 0x15540 << dsaf_dev->reset_offset;
-		reg_val_2 = 0x100 << dsaf_dev->reset_offset;
+
+		if (AE_IS_VER1(dsaf_dev->dsaf_ver))
+			reg_val_2 = 0x100 << dsaf_dev->reset_offset;
+		else
+			reg_val_2 = 0x40 << dsaf_dev->reset_offset;
 
 		if (!dereset) {
 			dsaf_write_sub(dsaf_dev, DSAF_SUB_SC_GE_RESET_REQ1_REG,
-- 
1.9.1

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[PATCH net-next 01/19] net: hns: bug fix of ge reset sequence Yisen Zhuang <Yisen.Zhuang@huawei.com> - 2016-06-21 05:50 +0200
  Re: [PATCH net-next 01/19] net: hns: bug fix of ge reset sequence Andy Shevchenko <andriy.shevchenko@linux.intel.com> - 2016-06-21 12:40 +0200
    Re: [PATCH net-next 01/19] net: hns: bug fix of ge reset sequence Yisen Zhuang <Yisen.zhuang@huawei.com> - 2016-06-22 03:40 +0200

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