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| From | Laxman Dewangan <ldewangan@nvidia.com> |
| Newsgroups | linux.kernel |
| Subject | [PATCH 3/5] pwm: tegra: fix overflow when calculating duty cycle |
| Date | Wed, 22 Jun 2016 14:10:02 +0200 |
| Message-ID | <rMP8K-3bX-29@gated-at.bofh.it> (permalink) |
| References | <rMP8J-3bX-9@gated-at.bofh.it> |
| X-Original-To | <thierry.reding@gmail.com>, <robh+dt@kernel.org>, <swarren@wwwdotorg.org>, <gnurou@gmail.com> |
| X-PGP-Universal | processed; by hkpgpgate102.nvidia.com on Wed, 22 Jun 2016 05:01:09 -0700 |
| X-Mailer | git-send-email 2.1.4 |
| MIME-Version | 1.0 |
| Content-Type | text/plain |
| Sender | robomod@news.nic.it |
| List-ID | <linux-kernel.vger.kernel.org> |
| X-Mailing-List | linux-kernel@vger.kernel.org |
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| Lines | 37 |
| Organization | linux.* mail to news gateway |
| X-Original-Cc | <linux-pwm@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-tegra@vger.kernel.org>, <linux-kernel@vger.kernel.org>, Hyong Bin Kim <hyongbink@nvidia.com>, Laxman Dewangan <ldewangan@nvidia.com> |
| X-Original-Date | Wed, 22 Jun 2016 17:17:21 +0530 |
| X-Original-Message-ID | <1466596043-27262-4-git-send-email-ldewangan@nvidia.com> |
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| Xref | csiph.com linux.kernel:1428730 |
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From: Hyong Bin Kim <hyongbink@nvidia.com>
duty_ns * (1 << PWM_DUTY_WIDTH) could overflow in integer calcualtion
when PWM rate is low. Hence do all calculation on unsigned long long
to avoid overflow.
Signed-off-by: Hyong Bin Kim <hyongbink@nvidia.com>
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
---
drivers/pwm/pwm-tegra.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/pwm/pwm-tegra.c b/drivers/pwm/pwm-tegra.c
index 575ca8e..49cefd5 100644
--- a/drivers/pwm/pwm-tegra.c
+++ b/drivers/pwm/pwm-tegra.c
@@ -69,7 +69,7 @@ static int tegra_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
int duty_ns, int period_ns)
{
struct tegra_pwm_chip *pc = to_tegra_pwm_chip(chip);
- unsigned long long c;
+ unsigned long long c = duty_ns;
unsigned long rate, hz;
u32 val = 0;
int err;
@@ -79,7 +79,8 @@ static int tegra_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
* per (1 << PWM_DUTY_WIDTH) cycles and make sure to round to the
* nearest integer during division.
*/
- c = duty_ns * (1 << PWM_DUTY_WIDTH) + period_ns / 2;
+ c *= (1 << PWM_DUTY_WIDTH);
+ c += period_ns / 2;
do_div(c, period_ns);
val = (u32)c << PWM_DUTY_SHIFT;
--
2.1.4
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[PATCH 0/5] pwm: Fixes and support for Tegra186 Laxman Dewangan <ldewangan@nvidia.com> - 2016-06-22 14:10 +0200
[PATCH 3/5] pwm: tegra: fix overflow when calculating duty cycle Laxman Dewangan <ldewangan@nvidia.com> - 2016-06-22 14:10 +0200
[PATCH 2/5] pwm: tegra: Allow 100% duty cycle Laxman Dewangan <ldewangan@nvidia.com> - 2016-06-22 14:10 +0200
[PATCH 4/5] pwm: tegra: Add DT node compatible for Tegra186 Laxman Dewangan <ldewangan@nvidia.com> - 2016-06-22 14:10 +0200
Re: [PATCH 4/5] pwm: tegra: Add DT node compatible for Tegra186 Thierry Reding <thierry.reding@gmail.com> - 2016-06-22 14:50 +0200
[PATCH 5/5] pwm: tegra: Add support for Tegra186 Laxman Dewangan <ldewangan@nvidia.com> - 2016-06-22 14:10 +0200
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