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Groups > linux.kernel > #1425887
| From | Andrey Smirnov <andrew.smirnov@gmail.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | [PATCH 1/2] ARM: cache-l2x0.c: Replace magic numbers |
| Date | 2016-06-19 02:40 +0200 |
| Message-ID | <rLyWl-2XM-23@gated-at.bofh.it> (permalink) |
| References | <rLyWl-2XM-5@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
Replace magic numbers used for L310 Prefetch Control Register
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
arch/arm/mm/cache-l2x0.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index 9f9d542..30e2012 100644
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
@@ -716,8 +716,10 @@ static void __init l2c310_fixup(void __iomem *base, u32 cache_id,
revision < L310_CACHE_ID_RTL_R3P2) {
u32 val = l2x0_saved_regs.prefetch_ctrl;
/* I don't think bit23 is required here... but iMX6 does so */
- if (val & (BIT(30) | BIT(23))) {
- val &= ~(BIT(30) | BIT(23));
+ if (val & (L310_PREFETCH_CTRL_DBL_LINEFILL |
+ L310_PREFETCH_CTRL_DBL_LINEFILL_INCR)) {
+ val &= ~(L310_PREFETCH_CTRL_DBL_LINEFILL |
+ L310_PREFETCH_CTRL_DBL_LINEFILL_INCR);
l2x0_saved_regs.prefetch_ctrl = val;
errata[n++] = "752271";
}
--
2.5.5
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[PATCH v3 0/5] i.MX L2-cache code cleanups and performance tweaks Andrey Smirnov <andrew.smirnov@gmail.com> - 2016-06-19 02:40 +0200
[PATCH v3 2/5] i.MX: system.c: Remove redundant errata 752271 code Andrey Smirnov <andrew.smirnov@gmail.com> - 2016-06-19 02:40 +0200
[PATCH 1/2] ARM: cache-l2x0.c: Replace magic numbers Andrey Smirnov <andrew.smirnov@gmail.com> - 2016-06-19 02:40 +0200
[PATCH 2/2] ARM: cache-l2x0.c: Do not clear bit 23 in prefetch control register Andrey Smirnov <andrew.smirnov@gmail.com> - 2016-06-19 02:40 +0200
Re: [PATCH v3 0/5] i.MX L2-cache code cleanups and performance tweaks Andrey Smirnov <andrew.smirnov@gmail.com> - 2016-06-19 03:10 +0200
Re: [PATCH v3 0/5] i.MX L2-cache code cleanups and performance tweaks Arnd Bergmann <arnd@arndb.de> - 2016-06-19 16:50 +0200
Re: [PATCH v3 0/5] i.MX L2-cache code cleanups and performance tweaks Andrey Smirnov <andrew.smirnov@gmail.com> - 2016-06-19 20:00 +0200
Re: [PATCH v3 0/5] i.MX L2-cache code cleanups and performance tweaks Arnd Bergmann <arnd@arndb.de> - 2016-06-21 01:50 +0200
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