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Re: [PATCH 03/17] pinctrl: uniphier: fix register offsets for drive strength control

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On Tue, May 31, 2016 at 10:05 AM, Masahiro Yamada
<yamada.masahiro@socionext.com> wrote:

> These pin tables were generated by parsing hardware documents with
> a script, but the script had a bug.  Fix the register offsets.
>
> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

Patch applied.

Yours,
Linus Walleij

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[PATCH 00/17] pinctrl: uniphier: many clean-ups and support new pinctrl drivers Masahiro Yamada <yamada.masahiro@socionext.com> - 2016-05-31 10:20 +0200
  [PATCH 14/17] pinctrl: uniphier: add System Bus pin-mux settings Masahiro Yamada <yamada.masahiro@socionext.com> - 2016-05-31 10:20 +0200
  [PATCH 06/17] pinctrl: uniphier: allocate struct pinctrl_desc in probe function Masahiro Yamada <yamada.masahiro@socionext.com> - 2016-05-31 10:20 +0200
  [PATCH 03/17] pinctrl: uniphier: fix register offsets for drive strength control Masahiro Yamada <yamada.masahiro@socionext.com> - 2016-05-31 10:20 +0200
    Re: [PATCH 03/17] pinctrl: uniphier: fix register offsets for drive  strength control Linus Walleij <linus.walleij@linaro.org> - 2016-05-31 12:40 +0200
  [PATCH 02/17] pinctrl: uniphier: rename function and variable names Masahiro Yamada <yamada.masahiro@socionext.com> - 2016-05-31 10:20 +0200
  [PATCH 08/17] pinctrl: uniphier: support 3-bit drive strength control Masahiro Yamada <yamada.masahiro@socionext.com> - 2016-05-31 10:20 +0200
  [PATCH 11/17] pinctrl: uniphier: support per-pin input enable for new SoCs Masahiro Yamada <yamada.masahiro@socionext.com> - 2016-05-31 10:20 +0200

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