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[PATCH 01/20] staging: comedi: plx9080.h: correct LRNG_IO_MASK and LMAP_IO_MASK

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For the PLX local address space range registers, LAS0RR and LAS1RR, bit
0 indicates whether the local address space will be mapped to memory
space or I/O space.  If mapped to I/O space, bit 1 must be set to 0, and
bits 31 to 2 form the address decoding mask, which should be -2^N mod
2^32 for a range of length 2^N.

The `LRNG_IO_MASK` macro is supposed to specify the address decoding
bits for I/O space.  It currently has the value `0xfffffffa`, but should
be `0xfffffffc`, or possibly `0xfffffffe` (it doesn't really matter,
since bit 1 is required to be set to 0).  Change it to `0xfffffffc`.

Similarly, for the PLX local address space local base address (remap)
registers, LAS0BA and LAS1BA, bits 31 to 2, masked with the
corresponding "range" register form the local base address for the local
address space.  The `LMAP_IO_MASK` macro is supposed to mask the valid
bits for I/O space.  Change its value from `0xfffffffa` to `0xfffffffc`
to match `LRNG_IO_MASK`.

Signed-off-by: Ian Abbott <abbotti@mev.co.uk>
---
 drivers/staging/comedi/drivers/plx9080.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/staging/comedi/drivers/plx9080.h b/drivers/staging/comedi/drivers/plx9080.h
index 8d1aee00b1..7d6311c 100644
--- a/drivers/staging/comedi/drivers/plx9080.h
+++ b/drivers/staging/comedi/drivers/plx9080.h
@@ -60,7 +60,7 @@ struct plx_dma_desc {
 /*  bits that specify range for memory io */
 #define  LRNG_MEM_MASK     0xfffffff0
 /*  bits that specify range for normal io */
-#define  LRNG_IO_MASK     0xfffffffa
+#define  LRNG_IO_MASK     0xfffffffc
 /* L, Local Addr Space 0 Remap Register */
 #define PLX_LAS0MAP_REG         0x0004
 /* L, Local Addr Space 1 Remap Register */
@@ -69,7 +69,7 @@ struct plx_dma_desc {
 /*  bits that specify decode for memory io */
 #define  LMAP_MEM_MASK     0xfffffff0
 /*  bits that specify decode bits for normal io */
-#define  LMAP_IO_MASK     0xfffffffa
+#define  LMAP_IO_MASK     0xfffffffc
 
 /*
  * Mode/Arbitration Register.
-- 
2.8.1

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[PATCH 00/20] staging: comedi: re-do drivers/plx9080.h Ian Abbott <abbotti@mev.co.uk> - 2016-05-20 15:50 +0200
  [PATCH 20/20] staging: comedi: plx9080.h: include headers for declarations Ian Abbott <abbotti@mev.co.uk> - 2016-05-20 16:00 +0200
  [PATCH 16/20] staging: comedi: drivers: re-do PLX PCI 9080 DMACSRx register values Ian Abbott <abbotti@mev.co.uk> - 2016-05-20 16:00 +0200
  [PATCH 14/20] staging: comedi: drivers: re-do PLX PCI 9080 DMAMODEx register values Ian Abbott <abbotti@mev.co.uk> - 2016-05-20 16:00 +0200
  [PATCH 18/20] staging: comedi: plx9080.h: tidy up some comments Ian Abbott <abbotti@mev.co.uk> - 2016-05-20 16:00 +0200
  [PATCH 15/20] staging: comedi: drivers: re-do PLX PCI 9080 DMADPRx register values Ian Abbott <abbotti@mev.co.uk> - 2016-05-20 16:00 +0200
  [PATCH 13/20] staging: comedi: plx9080.h: add hard-coded PCIHIDR register value Ian Abbott <abbotti@mev.co.uk> - 2016-05-20 16:00 +0200
  [PATCH 01/20] staging: comedi: plx9080.h: correct LRNG_IO_MASK and LMAP_IO_MASK Ian Abbott <abbotti@mev.co.uk> - 2016-05-20 16:00 +0200
  [PATCH 09/20] staging: comedi: drivers: re-do PLX PCI 9080 DMPBAM register values Ian Abbott <abbotti@mev.co.uk> - 2016-05-20 16:00 +0200
  [PATCH 07/20] staging: comedi: drivers: re-do PLX PCI 9080 BIGEND register values Ian Abbott <abbotti@mev.co.uk> - 2016-05-20 16:00 +0200
  [PATCH 06/20] staging: comedi: drivers: re-do PLX PCI 9080 MARBR register values Ian Abbott <abbotti@mev.co.uk> - 2016-05-20 16:00 +0200
  [PATCH 05/20] staging: comedi: drivers: re-do macros for PLX PCI 9080 LASxBA values Ian Abbott <abbotti@mev.co.uk> - 2016-05-20 16:00 +0200
  [PATCH 19/20] staging: comedi: plx9080.h: Add kerneldoc comments Ian Abbott <abbotti@mev.co.uk> - 2016-05-20 16:00 +0200
  [PATCH 12/20] staging: comedi: drivers: re-do PLX PCI 9080 CNTRL register values Ian Abbott <abbotti@mev.co.uk> - 2016-05-20 16:00 +0200
  [PATCH 10/20] staging: comedi: drivers: re-do PLX PCI 9080 DMCFGA register values Ian Abbott <abbotti@mev.co.uk> - 2016-05-20 16:00 +0200
  [PATCH 11/20] staging: comedi: drivers: re-do PLX PCI 9080 INTCSR register values Ian Abbott <abbotti@mev.co.uk> - 2016-05-20 16:00 +0200
  [PATCH 17/20] staging: comedi: drivers: add PLX PCI 9080 DMATHR register values Ian Abbott <abbotti@mev.co.uk> - 2016-05-20 16:00 +0200
  [PATCH 08/20] staging: comedi: drivers: re-do PLX PCI 9080 LBRDx register values Ian Abbott <abbotti@mev.co.uk> - 2016-05-20 16:00 +0200
  [PATCH 03/20] staging: comedi: drivers: rename PLX PCI 9080 register offsets Ian Abbott <abbotti@mev.co.uk> - 2016-05-20 16:00 +0200
    RE: [PATCH 03/20] staging: comedi: drivers: rename PLX PCI 9080  register offsets Hartley Sweeten <HartleyS@visionengravers.com> - 2016-05-20 18:30 +0200
      Re: [PATCH 03/20] staging: comedi: drivers: rename PLX PCI 9080  register offsets Ian Abbott <abbotti@mev.co.uk> - 2016-05-20 18:40 +0200
        RE: [PATCH 03/20] staging: comedi: drivers: rename PLX PCI 9080  register offsets Hartley Sweeten <HartleyS@visionengravers.com> - 2016-05-20 19:00 +0200

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