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Groups > linux.kernel > #1350787
| From | Rob Herring <robh@kernel.org> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | Re: [PATCH 2/5] Documentation: dt: socfpga: Add Altera Arri10 L2 cache binding |
| Date | 2016-03-05 05:30 +0100 |
| Message-ID | <r9c0Q-H5-87@gated-at.bofh.it> (permalink) |
| References | <r8Vjj-5hs-13@gated-at.bofh.it> <r9c0Q-H5-89@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
On Tue, Mar 01, 2016 at 10:38:18AM -0600, tthayer@opensource.altera.com wrote: > From: Thor Thayer <tthayer@opensource.altera.com> > > Add the device tree binding string needed to support the Altera L2 > cache on the Arria10 chip. > > Signed-off-by: Thor Thayer <tthayer@opensource.altera.com> > --- > .../bindings/arm/altera/socfpga-eccmgr.txt | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) Acked-by: Rob Herring <robh@kernel.org>
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Re: [PATCH 2/5] Documentation: dt: socfpga: Add Altera Arri10 L2 cache binding Rob Herring <robh@kernel.org> - 2016-03-05 05:30 +0100
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