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Re: [PATCH 3/6] x86/mbm: Intel Memory B/W Monitoring enumeration and init

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On Wed, 2 Mar 2016, Thomas Gleixner wrote:

> On Wed, 2 Mar 2016, Vikas Shivappa wrote:
>> +	if (cqm_enabled && mbm_enabled)
>> +		intel_cqm_events_group.attrs = intel_cmt_mbm_events_attr;
>> +	else if (!cqm_enabled && mbm_enabled)
>> +		intel_cqm_events_group.attrs = intel_mbm_events_attr;
>> +	else if (cqm_enabled && !mbm_enabled)
>> +		intel_cqm_events_group.attrs = intel_cqm_events_attr;
>> +
>>  	ret = perf_pmu_register(&intel_cqm_pmu, "intel_cqm", -1);
>>  	if (ret) {
>>  		pr_err("Intel CQM perf registration failed: %d\n", ret);
>>  		goto out;
>
> So what cleans up mbm_local and mbm_total in that case?

I put all the cleanup code in the cqm_cleanup .. - please see copy below

@@ -1331,6 +1427,39 @@ static void cqm_cleanup(void)
                 kfree(cqm_rmid_ptrs[r]);

         kfree(cqm_rmid_ptrs);
+       kfree(mbm_local);
+       kfree(mbm_total);
+       mbm_enabled = false;
+       cqm_enabled = false;
+}

Thanks,
Vikas


>
> Thanks,
>
> 	tglx
>

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[PATCH 3/6] x86/mbm: Intel Memory B/W Monitoring enumeration and init Vikas Shivappa <vikas.shivappa@linux.intel.com> - 2016-03-02 00:50 +0100
  Re: [PATCH 3/6] x86/mbm: Intel Memory B/W Monitoring enumeration  and init Thomas Gleixner <tglx@linutronix.de> - 2016-03-02 09:10 +0100
    Re: [PATCH 3/6] x86/mbm: Intel Memory B/W Monitoring enumeration  and init Vikas Shivappa <vikas.shivappa@intel.com> - 2016-03-02 19:00 +0100
      Re: [PATCH 3/6] x86/mbm: Intel Memory B/W Monitoring enumeration  and init Vikas Shivappa <vikas.shivappa@intel.com> - 2016-03-02 22:40 +0100
  Re: [PATCH 3/6] x86/mbm: Intel Memory B/W Monitoring enumeration and init Vikas Shivappa <vikas.shivappa@linux.intel.com> - 2016-03-03 01:00 +0100
    Re: [PATCH 3/6] x86/mbm: Intel Memory B/W Monitoring enumeration  and init Thomas Gleixner <tglx@linutronix.de> - 2016-03-03 08:40 +0100
      Re: [PATCH 3/6] x86/mbm: Intel Memory B/W Monitoring enumeration  and init Vikas Shivappa <vikas.shivappa@intel.com> - 2016-03-03 19:30 +0100
        Re: [PATCH 3/6] x86/mbm: Intel Memory B/W Monitoring enumeration  and init Thomas Gleixner <tglx@linutronix.de> - 2016-03-03 19:40 +0100

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