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Groups > linux.kernel > #1342367
| From | Thomas Gleixner <tglx@linutronix.de> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | Re: [PATCH 2/5] x86/mbm: Intel Memory B/W Monitoring enumeration and init |
| Date | 2016-02-24 20:30 +0100 |
| Message-ID | <r5Nii-Ew-27@gated-at.bofh.it> (permalink) |
| References | <r0NVE-1Am-7@gated-at.bofh.it> <r0O5k-1E8-9@gated-at.bofh.it> <r5ERJ-36A-43@gated-at.bofh.it> <r5Mcy-8nW-3@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
On Wed, 24 Feb 2016, Vikas Shivappa wrote: > On Wed, 24 Feb 2016, Thomas Gleixner wrote: > > You really should register the notifier _AFTER_ registering the pmu. That > > needs to be fixed anyway, because the existing code leaks the notifier AND > > memory in case perf_pmu_register fails. > > Correct, Will fix the notifier leak It's not only a notifier leak. The existing code also leaks memory. Please fix that before adding the new stuff in a seperate patch. Thanks, tglx
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Re: [PATCH 2/5] x86/mbm: Intel Memory B/W Monitoring enumeration and init Thomas Gleixner <tglx@linutronix.de> - 2016-02-24 11:30 +0100
Re: [PATCH 2/5] x86/mbm: Intel Memory B/W Monitoring enumeration and init Vikas Shivappa <vikas.shivappa@intel.com> - 2016-02-24 19:20 +0100
Re: [PATCH 2/5] x86/mbm: Intel Memory B/W Monitoring enumeration and init Thomas Gleixner <tglx@linutronix.de> - 2016-02-24 20:30 +0100
Re: [PATCH 2/5] x86/mbm: Intel Memory B/W Monitoring enumeration and init Vikas Shivappa <vikas.shivappa@intel.com> - 2016-02-24 21:10 +0100
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