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Groups > linux.kernel > #1339686

[PATCH v2 13/15] dmaengine: dw: move dwc->initialized to dwc->flags

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We have already dedicated variable for flags, therefore no need to create an
additional storage for that. Covert dwc->initialized to use dwc->flags.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Mans Rullgard <mans@mansr.com>
---
 drivers/dma/dw/core.c | 8 ++++----
 drivers/dma/dw/regs.h | 2 +-
 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/dma/dw/core.c b/drivers/dma/dw/core.c
index 6cc83df..dbf026c 100644
--- a/drivers/dma/dw/core.c
+++ b/drivers/dma/dw/core.c
@@ -138,7 +138,7 @@ static void dwc_initialize(struct dw_dma_chan *dwc)
 	u32 cfghi = DWC_CFGH_FIFO_MODE;
 	u32 cfglo = DWC_CFGL_CH_PRIOR(dwc->priority);
 
-	if (dwc->initialized == true)
+	if (test_bit(DW_DMA_IS_INITIALIZED, &dwc->flags))
 		return;
 
 	if (dws) {
@@ -162,7 +162,7 @@ static void dwc_initialize(struct dw_dma_chan *dwc)
 	channel_set_bit(dw, MASK.XFER, dwc->mask);
 	channel_set_bit(dw, MASK.ERROR, dwc->mask);
 
-	dwc->initialized = true;
+	set_bit(DW_DMA_IS_INITIALIZED, &dwc->flags);
 }
 
 /*----------------------------------------------------------------------*/
@@ -1107,7 +1107,7 @@ static void dw_dma_off(struct dw_dma *dw)
 		cpu_relax();
 
 	for (i = 0; i < dw->dma.chancnt; i++)
-		dw->chan[i].initialized = false;
+		clear_bit(DW_DMA_IS_INITIALIZED, &dw->chan[i].flags);
 }
 
 static void dw_dma_on(struct dw_dma *dw)
@@ -1200,13 +1200,13 @@ static void dwc_free_chan_resources(struct dma_chan *chan)
 	spin_lock_irqsave(&dwc->lock, flags);
 	list_splice_init(&dwc->free_list, &list);
 	dwc->descs_allocated = 0;
-	dwc->initialized = false;
 
 	/* Disable interrupts */
 	channel_clear_bit(dw, MASK.XFER, dwc->mask);
 	channel_clear_bit(dw, MASK.BLOCK, dwc->mask);
 	channel_clear_bit(dw, MASK.ERROR, dwc->mask);
 
+	clear_bit(DW_DMA_IS_INITIALIZED, &dwc->flags);
 	spin_unlock_irqrestore(&dwc->lock, flags);
 
 	/* Disable controller in case it was a last user */
diff --git a/drivers/dma/dw/regs.h b/drivers/dma/dw/regs.h
index 6355f6c..2c0561d 100644
--- a/drivers/dma/dw/regs.h
+++ b/drivers/dma/dw/regs.h
@@ -217,6 +217,7 @@ enum dw_dmac_flags {
 	DW_DMA_IS_CYCLIC = 0,
 	DW_DMA_IS_SOFT_LLP = 1,
 	DW_DMA_IS_PAUSED = 2,
+	DW_DMA_IS_INITIALIZED = 3,
 };
 
 struct dw_dma_chan {
@@ -225,7 +226,6 @@ struct dw_dma_chan {
 	u8				mask;
 	u8				priority;
 	enum dma_transfer_direction	direction;
-	bool				initialized;
 
 	/* software emulation of the LLP transfers */
 	struct list_head	*tx_node_active;
-- 
2.7.0

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[PATCH v2 00/15] Fixes / cleanups in dw_dmac (affects on few subsystems) Andy Shevchenko <andriy.shevchenko@linux.intel.com> - 2016-02-22 17:10 +0100
  [PATCH v2 10/15] dmaengine: dw: pass platform data via struct dw_dma_chip Andy Shevchenko <andriy.shevchenko@linux.intel.com> - 2016-02-22 17:10 +0100
  [PATCH v2 14/15] dmaengine: dw: move residue to a descriptor Andy Shevchenko <andriy.shevchenko@linux.intel.com> - 2016-02-22 17:10 +0100
  [PATCH v2 07/15] dmaengine: dw: revisit data_width property Andy Shevchenko <andriy.shevchenko@linux.intel.com> - 2016-02-22 17:10 +0100
  [PATCH v2 09/15] dmaengine: dw: keep entire platform data in struct dw_dma Andy Shevchenko <andriy.shevchenko@linux.intel.com> - 2016-02-22 17:10 +0100
  [PATCH v2 01/15] dmaengine: dw: fix byte order of hw descriptor fields Andy Shevchenko <andriy.shevchenko@linux.intel.com> - 2016-02-22 17:10 +0100
  [PATCH v2 11/15] dmaengine: dw: platform: use field-by-field initialization Andy Shevchenko <andriy.shevchenko@linux.intel.com> - 2016-02-22 17:10 +0100
  [PATCH v2 08/15] dmaengine: dw: define counter variables as unsigned int Andy Shevchenko <andriy.shevchenko@linux.intel.com> - 2016-02-22 17:10 +0100
  [PATCH v2 15/15] dmaengine: dw: set cdesc to NULL when free cyclic transfers Andy Shevchenko <andriy.shevchenko@linux.intel.com> - 2016-02-22 17:10 +0100
  [PATCH v2 02/15] dmaengine: dw: clear LLP_[SD]_EN bits in last descriptor of a chain Andy Shevchenko <andriy.shevchenko@linux.intel.com> - 2016-02-22 17:10 +0100
  [PATCH v2 13/15] dmaengine: dw: move dwc->initialized to dwc->flags Andy Shevchenko <andriy.shevchenko@linux.intel.com> - 2016-02-22 17:10 +0100
  [PATCH v2 04/15] dmaengine: dw: set src and dst master select according to xfer direction Andy Shevchenko <andriy.shevchenko@linux.intel.com> - 2016-02-22 17:10 +0100
  [PATCH v2 12/15] dmaengine: dw: move dwc->paused to dwc->flags Andy Shevchenko <andriy.shevchenko@linux.intel.com> - 2016-02-22 17:10 +0100
  [PATCH v2 03/15] dmaengine: dw: rename masters to reflect actual topology Andy Shevchenko <andriy.shevchenko@linux.intel.com> - 2016-02-22 17:10 +0100
  [PATCH v2 06/15] dmaengine: dw: substitute dma_read_byaddr by dma_readl_native Andy Shevchenko <andriy.shevchenko@linux.intel.com> - 2016-02-22 17:10 +0100
  [PATCH v2 05/15] dmaengine: dw: set LMS field in descriptors Andy Shevchenko <andriy.shevchenko@linux.intel.com> - 2016-02-22 17:10 +0100

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