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Groups > linux.kernel > #1339688

[PATCH v2 12/15] dmaengine: dw: move dwc->paused to dwc->flags

From Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Newsgroups linux.kernel
Subject [PATCH v2 12/15] dmaengine: dw: move dwc->paused to dwc->flags
Date 2016-02-22 17:10 +0100
Message-ID <r51dE-8d4-33@gated-at.bofh.it> (permalink)
References <r51dD-8d4-1@gated-at.bofh.it>
Organization linux.* mail to news gateway

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We have already dedicated variable for flags, therefore no need to create an
additional storage for that. Convert dwc->paused to use dwc->flags.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Mans Rullgard <mans@mansr.com>
---
 drivers/dma/dw/core.c | 12 +++++-------
 drivers/dma/dw/regs.h |  2 +-
 2 files changed, 6 insertions(+), 8 deletions(-)

diff --git a/drivers/dma/dw/core.c b/drivers/dma/dw/core.c
index e2502d4..6cc83df 100644
--- a/drivers/dma/dw/core.c
+++ b/drivers/dma/dw/core.c
@@ -979,7 +979,7 @@ static int dwc_pause(struct dma_chan *chan)
 	while (!(channel_readl(dwc, CFG_LO) & DWC_CFGL_FIFO_EMPTY) && count--)
 		udelay(2);
 
-	dwc->paused = true;
+	set_bit(DW_DMA_IS_PAUSED, &dwc->flags);
 
 	spin_unlock_irqrestore(&dwc->lock, flags);
 
@@ -992,7 +992,7 @@ static inline void dwc_chan_resume(struct dw_dma_chan *dwc)
 
 	channel_writel(dwc, CFG_LO, cfglo & ~DWC_CFGL_CH_SUSP);
 
-	dwc->paused = false;
+	clear_bit(DW_DMA_IS_PAUSED, &dwc->flags);
 }
 
 static int dwc_resume(struct dma_chan *chan)
@@ -1000,12 +1000,10 @@ static int dwc_resume(struct dma_chan *chan)
 	struct dw_dma_chan	*dwc = to_dw_dma_chan(chan);
 	unsigned long		flags;
 
-	if (!dwc->paused)
-		return 0;
-
 	spin_lock_irqsave(&dwc->lock, flags);
 
-	dwc_chan_resume(dwc);
+	if (test_bit(DW_DMA_IS_PAUSED, &dwc->flags))
+		dwc_chan_resume(dwc);
 
 	spin_unlock_irqrestore(&dwc->lock, flags);
 
@@ -1074,7 +1072,7 @@ dwc_tx_status(struct dma_chan *chan,
 	if (ret != DMA_COMPLETE)
 		dma_set_residue(txstate, dwc_get_residue(dwc));
 
-	if (dwc->paused && ret == DMA_IN_PROGRESS)
+	if (test_bit(DW_DMA_IS_PAUSED, &dwc->flags) && ret == DMA_IN_PROGRESS)
 		return DMA_PAUSED;
 
 	return ret;
diff --git a/drivers/dma/dw/regs.h b/drivers/dma/dw/regs.h
index 4424940..6355f6c 100644
--- a/drivers/dma/dw/regs.h
+++ b/drivers/dma/dw/regs.h
@@ -216,6 +216,7 @@ enum dw_dma_msize {
 enum dw_dmac_flags {
 	DW_DMA_IS_CYCLIC = 0,
 	DW_DMA_IS_SOFT_LLP = 1,
+	DW_DMA_IS_PAUSED = 2,
 };
 
 struct dw_dma_chan {
@@ -224,7 +225,6 @@ struct dw_dma_chan {
 	u8				mask;
 	u8				priority;
 	enum dma_transfer_direction	direction;
-	bool				paused;
 	bool				initialized;
 
 	/* software emulation of the LLP transfers */
-- 
2.7.0

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Thread

[PATCH v2 00/15] Fixes / cleanups in dw_dmac (affects on few subsystems) Andy Shevchenko <andriy.shevchenko@linux.intel.com> - 2016-02-22 17:10 +0100
  [PATCH v2 10/15] dmaengine: dw: pass platform data via struct dw_dma_chip Andy Shevchenko <andriy.shevchenko@linux.intel.com> - 2016-02-22 17:10 +0100
  [PATCH v2 14/15] dmaengine: dw: move residue to a descriptor Andy Shevchenko <andriy.shevchenko@linux.intel.com> - 2016-02-22 17:10 +0100
  [PATCH v2 07/15] dmaengine: dw: revisit data_width property Andy Shevchenko <andriy.shevchenko@linux.intel.com> - 2016-02-22 17:10 +0100
  [PATCH v2 09/15] dmaengine: dw: keep entire platform data in struct dw_dma Andy Shevchenko <andriy.shevchenko@linux.intel.com> - 2016-02-22 17:10 +0100
  [PATCH v2 01/15] dmaengine: dw: fix byte order of hw descriptor fields Andy Shevchenko <andriy.shevchenko@linux.intel.com> - 2016-02-22 17:10 +0100
  [PATCH v2 11/15] dmaengine: dw: platform: use field-by-field initialization Andy Shevchenko <andriy.shevchenko@linux.intel.com> - 2016-02-22 17:10 +0100
  [PATCH v2 08/15] dmaengine: dw: define counter variables as unsigned int Andy Shevchenko <andriy.shevchenko@linux.intel.com> - 2016-02-22 17:10 +0100
  [PATCH v2 15/15] dmaengine: dw: set cdesc to NULL when free cyclic transfers Andy Shevchenko <andriy.shevchenko@linux.intel.com> - 2016-02-22 17:10 +0100
  [PATCH v2 02/15] dmaengine: dw: clear LLP_[SD]_EN bits in last descriptor of a chain Andy Shevchenko <andriy.shevchenko@linux.intel.com> - 2016-02-22 17:10 +0100
  [PATCH v2 13/15] dmaengine: dw: move dwc->initialized to dwc->flags Andy Shevchenko <andriy.shevchenko@linux.intel.com> - 2016-02-22 17:10 +0100
  [PATCH v2 04/15] dmaengine: dw: set src and dst master select according to xfer direction Andy Shevchenko <andriy.shevchenko@linux.intel.com> - 2016-02-22 17:10 +0100
  [PATCH v2 12/15] dmaengine: dw: move dwc->paused to dwc->flags Andy Shevchenko <andriy.shevchenko@linux.intel.com> - 2016-02-22 17:10 +0100
  [PATCH v2 03/15] dmaengine: dw: rename masters to reflect actual topology Andy Shevchenko <andriy.shevchenko@linux.intel.com> - 2016-02-22 17:10 +0100
  [PATCH v2 06/15] dmaengine: dw: substitute dma_read_byaddr by dma_readl_native Andy Shevchenko <andriy.shevchenko@linux.intel.com> - 2016-02-22 17:10 +0100
  [PATCH v2 05/15] dmaengine: dw: set LMS field in descriptors Andy Shevchenko <andriy.shevchenko@linux.intel.com> - 2016-02-22 17:10 +0100

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