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Re: [V5 PATCH 2/4] panic/x86: Allow cpus to save registers even if they are looping in NMI context

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On Tue, Nov 24, 2015 at 02:37:00PM -0500, Steven Rostedt wrote:
> On Tue, Nov 24, 2015 at 11:48:53AM +0100, Borislav Petkov wrote:
> > 
> > > +	 */
> > > +	while (!raw_spin_trylock(&nmi_reason_lock))
> > > +		poll_crash_ipi_and_callback(regs);
> > 
> > Waaait a minute: so if we're getting NMIs broadcasted on every core but
> > we're *not* crash dumping, we will run into here too. This can't be
> > right. :-\
> 
> This only does something if crash_ipi_done is set, which means you are killing
> the box.

Yeah, Michal and I discussed that on IRC today. And yeah, it is really
tricky stuff. So I appreciate it a lot you looking at it too. Thanks!

> But perhaps a comment that states that here would be useful, or maybe
> just put in the check here. There's no need to make it depend on SMP, as
> raw_spin_trylock() will turn to just ({1}) for UP, and that code wont even be
> hit.

Right, this code needs much more thorough documentation to counter the
trickiness.

Thanks.

-- 
Regards/Gruss,
    Boris.

ECO tip #101: Trim your mails when you reply.
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[V5 PATCH 2/4] panic/x86: Allow cpus to save registers even if they  are looping in NMI context Hidehiro Kawai <hidehiro.kawai.ez@hitachi.com> - 2015-11-20 11:20 +0100
  Re: [V5 PATCH 2/4] panic/x86: Allow cpus to save registers even if  they are looping in NMI context Borislav Petkov <bp@alien8.de> - 2015-11-24 11:50 +0100
    Re: [V5 PATCH 2/4] panic/x86: Allow cpus to save registers even if  they are looping in NMI context Steven Rostedt <rostedt@goodmis.org> - 2015-11-24 20:40 +0100
      Re: [V5 PATCH 2/4] panic/x86: Allow cpus to save registers even if  they are looping in NMI context Borislav Petkov <bp@alien8.de> - 2015-11-24 21:20 +0100
      RE: [V5 PATCH 2/4] panic/x86: Allow cpus to save registers even if  they are looping in NMI context 河合英宏 / KAWAI，HIDEHIRO   <hidehiro.kawai.ez@hitachi.com> - 2015-11-25 07:00 +0100
    RE: [V5 PATCH 2/4] panic/x86: Allow cpus to save registers even if  they are looping in NMI context 河合英宏 / KAWAI，HIDEHIRO   <hidehiro.kawai.ez@hitachi.com> - 2015-11-25 07:00 +0100
      Re: [V5 PATCH 2/4] panic/x86: Allow cpus to save registers even if  they are looping in NMI context Borislav Petkov <bp@alien8.de> - 2015-11-25 10:00 +0100
        RE: [V5 PATCH 2/4] panic/x86: Allow cpus to save registers even if  they are looping in NMI context 河合英宏 / KAWAI，HIDEHIRO   <hidehiro.kawai.ez@hitachi.com> - 2015-11-25 10:50 +0100
          Re: [V5 PATCH 2/4] panic/x86: Allow cpus to save registers even if  they are looping in NMI context Borislav Petkov <bp@alien8.de> - 2015-11-25 11:00 +0100
            RE: [V5 PATCH 2/4] panic/x86: Allow cpus to save registers even if  they are looping in NMI context 河合英宏 / KAWAI，HIDEHIRO   <hidehiro.kawai.ez@hitachi.com> - 2015-11-25 16:20 +0100
  Re: [V5 PATCH 2/4] panic/x86: Allow cpus to save registers even if  they are looping in NMI context Michal Hocko <mhocko@kernel.org> - 2015-11-24 14:00 +0100

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