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Re: [V5 PATCH 2/4] panic/x86: Allow cpus to save registers even if they are looping in NMI context

From Borislav Petkov <bp@alien8.de>
Newsgroups linux.kernel
Subject Re: [V5 PATCH 2/4] panic/x86: Allow cpus to save registers even if they are looping in NMI context
Date 2015-11-25 11:00 +0100
Message-ID <qyF1M-4qs-11@gated-at.bofh.it> (permalink)
References (1 earlier) <qwQXo-5SQ-7@gated-at.bofh.it> <qyjkB-6ZF-9@gated-at.bofh.it> <qyBhw-1WU-13@gated-at.bofh.it> <qyE5I-3P7-3@gated-at.bofh.it> <qyES6-4mS-27@gated-at.bofh.it>
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On Wed, Nov 25, 2015 at 09:46:37AM +0000, 河合英宏 / KAWAI,HIDEHIRO wrote:
> Does *old* code mean the code without this patch *series* ?

Yes.

> I prefer this, but we might want to add some more prefix or suffix.
> For example, "conditionally_run_crash_nmi_callback".

That's unnecessary IMO. If you need to express that, you could write
that in a comment above the function definition. Anyone who looks at
the code then will know that it is conditional, like so many other
kernel functions. :)

> Thanks for your deep review!

Thanks for the patience!

:-)

-- 
Regards/Gruss,
    Boris.

ECO tip #101: Trim your mails when you reply.
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Thread

[V5 PATCH 2/4] panic/x86: Allow cpus to save registers even if they  are looping in NMI context Hidehiro Kawai <hidehiro.kawai.ez@hitachi.com> - 2015-11-20 11:20 +0100
  Re: [V5 PATCH 2/4] panic/x86: Allow cpus to save registers even if  they are looping in NMI context Borislav Petkov <bp@alien8.de> - 2015-11-24 11:50 +0100
    Re: [V5 PATCH 2/4] panic/x86: Allow cpus to save registers even if  they are looping in NMI context Steven Rostedt <rostedt@goodmis.org> - 2015-11-24 20:40 +0100
      Re: [V5 PATCH 2/4] panic/x86: Allow cpus to save registers even if  they are looping in NMI context Borislav Petkov <bp@alien8.de> - 2015-11-24 21:20 +0100
      RE: [V5 PATCH 2/4] panic/x86: Allow cpus to save registers even if  they are looping in NMI context 河合英宏 / KAWAI,HIDEHIRO   <hidehiro.kawai.ez@hitachi.com> - 2015-11-25 07:00 +0100
    RE: [V5 PATCH 2/4] panic/x86: Allow cpus to save registers even if  they are looping in NMI context 河合英宏 / KAWAI,HIDEHIRO   <hidehiro.kawai.ez@hitachi.com> - 2015-11-25 07:00 +0100
      Re: [V5 PATCH 2/4] panic/x86: Allow cpus to save registers even if  they are looping in NMI context Borislav Petkov <bp@alien8.de> - 2015-11-25 10:00 +0100
        RE: [V5 PATCH 2/4] panic/x86: Allow cpus to save registers even if  they are looping in NMI context 河合英宏 / KAWAI,HIDEHIRO   <hidehiro.kawai.ez@hitachi.com> - 2015-11-25 10:50 +0100
          Re: [V5 PATCH 2/4] panic/x86: Allow cpus to save registers even if  they are looping in NMI context Borislav Petkov <bp@alien8.de> - 2015-11-25 11:00 +0100
            RE: [V5 PATCH 2/4] panic/x86: Allow cpus to save registers even if  they are looping in NMI context 河合英宏 / KAWAI,HIDEHIRO   <hidehiro.kawai.ez@hitachi.com> - 2015-11-25 16:20 +0100
  Re: [V5 PATCH 2/4] panic/x86: Allow cpus to save registers even if  they are looping in NMI context Michal Hocko <mhocko@kernel.org> - 2015-11-24 14:00 +0100

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