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Groups > linux.kernel > #1273808

[PATCH v4 02/13] clk: rockchip: add mipidsi clocks on rk3288

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sclk_mipidsi_24m is the gating of mipi dsi phy.

Signed-off-by: Chris Zhong <zyw@rock-chips.com>
---

Changes in v4: None
Changes in v3: None
Changes in v2: None

 drivers/clk/rockchip/clk-rk3288.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/rockchip/clk-rk3288.c b/drivers/clk/rockchip/clk-rk3288.c
index 9040878..c7d7ebf 100644
--- a/drivers/clk/rockchip/clk-rk3288.c
+++ b/drivers/clk/rockchip/clk-rk3288.c
@@ -709,7 +709,7 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = {
 	GATE(SCLK_LCDC_PWM1, "sclk_lcdc_pwm1", "xin24m", 0, RK3288_CLKGATE_CON(13), 11, GFLAGS),
 	GATE(SCLK_PVTM_CORE, "sclk_pvtm_core", "xin24m", 0, RK3288_CLKGATE_CON(5), 9, GFLAGS),
 	GATE(SCLK_PVTM_GPU, "sclk_pvtm_gpu", "xin24m", 0, RK3288_CLKGATE_CON(5), 10, GFLAGS),
-	GATE(0, "sclk_mipidsi_24m", "xin24m", 0, RK3288_CLKGATE_CON(5), 15, GFLAGS),
+	GATE(SCLK_MIPI_24M, "sclk_mipidsi_24m", "xin24m", 0, RK3288_CLKGATE_CON(5), 15, GFLAGS),
 
 	/* sclk_gpu gates */
 	GATE(ACLK_GPU, "aclk_gpu", "sclk_gpu", 0, RK3288_CLKGATE_CON(18), 0, GFLAGS),
-- 
2.6.3

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Thread

[PATCH v4 0/13] Add mipi dsi support for rk3288 Chris Zhong <zyw@rock-chips.com> - 2015-11-20 09:20 +0100
  [PATCH v4 05/13] Documentation: dt-bindings: Add bindings for Synopsys DW MIPI DSI DRM bridge driver Chris Zhong <zyw@rock-chips.com> - 2015-11-20 09:20 +0100
    Re: [PATCH v4 05/13] Documentation: dt-bindings: Add bindings for  Synopsys DW MIPI DSI DRM bridge driver Rob Herring <robh@kernel.org> - 2015-11-20 15:40 +0100
  [PATCH v4 02/13] clk: rockchip: add mipidsi clocks on rk3288 Chris Zhong <zyw@rock-chips.com> - 2015-11-20 09:20 +0100
  [PATCH v4 07/13] drm: rockchip: Support Synopsys DesignWare MIPI DSI host controller Chris Zhong <zyw@rock-chips.com> - 2015-11-20 09:20 +0100
  [PATCH v4 01/13] clk: rockchip: add id for mipidsi sclk on rk3288 Chris Zhong <zyw@rock-chips.com> - 2015-11-20 09:20 +0100
    Re: [PATCH v4 01/13] clk: rockchip: add id for mipidsi sclk on rk3288 Heiko Stübner <heiko@sntech.de> - 2015-11-23 18:40 +0100
  [PATCH v4 06/13] drm/bridge: Add Synopsys DesignWare MIPI DSI host controller driver Chris Zhong <zyw@rock-chips.com> - 2015-11-20 09:20 +0100
    Re: [PATCH v4 06/13] drm/bridge: Add Synopsys DesignWare MIPI DSI  host controller driver Thierry Reding <treding@nvidia.com> - 2015-11-20 17:10 +0100
      Re: [PATCH v4 06/13] drm/bridge: Add Synopsys DesignWare MIPI DSI  host controller driver Chris Zhong <zyw@rock-chips.com> - 2015-11-26 08:10 +0100
        Re: [PATCH v4 06/13] drm/bridge: Add Synopsys DesignWare MIPI DSI  host controller driver Thierry Reding <treding@nvidia.com> - 2015-11-26 09:10 +0100
          Re: [PATCH v4 06/13] drm/bridge: Add Synopsys DesignWare MIPI DSI  host controller driver Chris Zhong <zyw@rock-chips.com> - 2015-11-26 11:10 +0100
  [PATCH v4 03/13] drm/rockchip: return a true clock rate to adjusted_mode Chris Zhong <zyw@rock-chips.com> - 2015-11-20 09:20 +0100
    Re: [PATCH v4 03/13] drm/rockchip: return a true clock rate to adjusted_mode Mark yao <mark.yao@rock-chips.com> - 2015-11-20 10:00 +0100
  [PATCH v4 08/13] Documentation: dt-bindings: Add bindings for rk3288 DW MIPI DSI driver Chris Zhong <zyw@rock-chips.com> - 2015-11-20 09:20 +0100

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