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Re: [PATCH] brcmnand: Clear EXT_ADDR error registers in PIO mode

From Brian Norris <computersforpeace@gmail.com>
Newsgroups linux.kernel
Subject Re: [PATCH] brcmnand: Clear EXT_ADDR error registers in PIO mode
Date 2015-11-17 19:00 +0100
Message-ID <qvSHU-8dG-3@gated-at.bofh.it> (permalink)
References <qvA8h-4Gl-13@gated-at.bofh.it> <qvCD7-69M-11@gated-at.bofh.it> <qvJbA-235-15@gated-at.bofh.it>
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On Tue, Nov 17, 2015 at 07:41:21AM +0000, Simon Arlott wrote:
> On 17/11/15 00:40, Brian Norris wrote:
> > + bcm-kernel-feedback-list
> > 
> > On Mon, Nov 16, 2015 at 10:05:39PM +0000, Simon Arlott wrote:
> >> If an error occurs in flash above 4GB in PIO mode then the EXT_ADDR
> >> registers will be set to the location of the error and never cleared.
> >> 
> >> Reset them to 0 before reading.
> >> 
> >> Signed-off-by: Simon Arlott <simon@fire.lp0.eu>
> > 
> > Patch looks OK. Did you see this problem in practice, or is this just
> > theoretical? I thought the documentation seemed to suggest these
> > registers were cleared together with their non-_EXT counterparts. But
> > implementation definitely trumps documentation for HW.
> 
> It's theoretical (I don't have 4GB+ flash), but the Broadcom version of
> the NAND driver does this.

That's a funny thing to say :) There never really was a single "Broadcom
version" until we settled on upstreaming this one. It's a direct
descendant of this [1], which also does not do these writes, and was
tested on >4GB flash, though not extensively.

Which product line did you get your driver from, then?

Anyway, unless someone still at Broadcom can confirm or deny, I suppose
this patch is mostly harmless and I can take it.

Brian

> > Brian
> > 
> >> ---
> >>  drivers/mtd/nand/brcmnand/brcmnand.c | 2 ++
> >>  1 file changed, 2 insertions(+)
> >> 
> >> diff --git a/drivers/mtd/nand/brcmnand/brcmnand.c b/drivers/mtd/nand/brcmnand/brcmnand.c
> >> index 12c6190..2c8f67f 100644
> >> --- a/drivers/mtd/nand/brcmnand/brcmnand.c
> >> +++ b/drivers/mtd/nand/brcmnand/brcmnand.c
> >> @@ -1400,6 +1400,8 @@ static int brcmnand_read_by_pio(struct mtd_info *mtd, struct nand_chip *chip,
> >>  	/* Clear error addresses */
> >>  	brcmnand_write_reg(ctrl, BRCMNAND_UNCORR_ADDR, 0);
> >>  	brcmnand_write_reg(ctrl, BRCMNAND_CORR_ADDR, 0);
> >> +	brcmnand_write_reg(ctrl, BRCMNAND_UNCORR_EXT_ADDR, 0);
> >> +	brcmnand_write_reg(ctrl, BRCMNAND_CORR_EXT_ADDR, 0);
> >>  
> >>  	brcmnand_write_reg(ctrl, BRCMNAND_CMD_EXT_ADDRESS,
> >>  			(host->cs << 16) | ((addr >> 32) & 0xffff));
> >> -- 
> >> 2.1.4
> >> 
> >> -- 
> >> Simon Arlott
> > 
> 
> 
> -- 
> Simon Arlott

[1] https://github.com/Broadcom/stblinux-3.8/blob/master/linux/drivers/mtd/nand/brcmstb_nand.c
    Disclaimer: I used to work at Broadcom.
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Thread

[PATCH] brcmnand: Clear EXT_ADDR error registers in PIO mode Simon Arlott <simon@fire.lp0.eu> - 2015-11-16 23:10 +0100
  Re: [PATCH] brcmnand: Clear EXT_ADDR error registers in PIO mode Brian Norris <computersforpeace@gmail.com> - 2015-11-17 01:50 +0100
    Re: [PATCH] brcmnand: Clear EXT_ADDR error registers in PIO mode Simon Arlott <simon@fire.lp0.eu> - 2015-11-17 08:50 +0100
      Re: [PATCH] brcmnand: Clear EXT_ADDR error registers in PIO mode Brian Norris <computersforpeace@gmail.com> - 2015-11-17 19:00 +0100
        Re: [PATCH] brcmnand: Clear EXT_ADDR error registers in PIO mode Simon Arlott <simon@fire.lp0.eu> - 2015-11-20 19:50 +0100

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