Re: [PATCH v2 18/19] ARC: [plat-eznps] replace sync with proper cpu barrier

From	Peter Zijlstra <peterz@infradead.org>
Newsgroups	linux.kernel
Subject	Re: [PATCH v2 18/19] ARC: [plat-eznps] replace sync with proper cpu barrier
Date	2015-11-17 15:00 +0100
Message-ID	<qvOXF-5L7-25@gated-at.bofh.it> (permalink)
References	(4 earlier) <qvMMa-4qX-7@gated-at.bofh.it> <qvNyy-4XK-1@gated-at.bofh.it> <qvNIe-50X-5@gated-at.bofh.it> <qvNRU-54p-19@gated-at.bofh.it> <qvOEi-5DR-9@gated-at.bofh.it>
Organization	linux.* mail to news gateway

Show all headers | View raw

On Tue, Nov 17, 2015 at 07:02:00PM +0530, Vineet Gupta wrote:
> > You should never report more than PERF_MAX_STACK_DEPTH thingies anyway,
> > so once you've done that many loops, you're good to bail, right?
> 
> Yeah, although I need to ensure if arch code needs to check that. Plus the
> unwinder is also used for things like ps wchan, /proc/<pid>/stack, crash dump etc.

Ah, ok. On x86 we have a separate unwinder for perf. Trying to touch
userspace memory from NMI context is a tad tricky.

(imagine the NMI interrupting a page-fault and then itself triggering a
page-fault again)

> > You're likely to call this code from interrupt/NMI context, there is no
> > ^C or scheduling going to help you there.
> 
> For perf case, but there are other uses of unwinder as described above.
> 
> So in light of above, do u think that the cond_resched() + signal_pending check is
> not needed and the bail if over N iters will be fine !

It can't hurt, but you want to engineer it to be robust for the most
constrained environment, so I would say the bail over N iters had
better be robust, otherwise you're screwed anyhow ;-)
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

Back to linux.kernel | Previous | Next — Previous in thread | Find similar | Unroll thread

Thread

Re: [PATCH v2 18/19] ARC: [plat-eznps] replace sync with proper cpu  barrier Vineet Gupta <Vineet.Gupta1@synopsys.com> - 2015-11-17 12:20 +0100
  Re: [PATCH v2 18/19] ARC: [plat-eznps] replace sync with proper cpu  barrier Peter Zijlstra <peterz@infradead.org> - 2015-11-17 12:30 +0100
    Re: [PATCH v2 18/19] ARC: [plat-eznps] replace sync with proper cpu  barrier Vineet Gupta <Vineet.Gupta1@synopsys.com> - 2015-11-17 12:40 +0100
      Re: [PATCH v2 18/19] ARC: [plat-eznps] replace sync with proper cpu  barrier Peter Zijlstra <peterz@infradead.org> - 2015-11-17 13:30 +0100
        Re: [PATCH v2 18/19] ARC: [plat-eznps] replace sync with proper cpu  barrier Vineet Gupta <Vineet.Gupta1@synopsys.com> - 2015-11-17 13:40 +0100
          Re: [PATCH v2 18/19] ARC: [plat-eznps] replace sync with proper cpu  barrier Peter Zijlstra <peterz@infradead.org> - 2015-11-17 13:50 +0100
            Re: [PATCH v2 18/19] ARC: [plat-eznps] replace sync with proper cpu  barrier Vineet Gupta <Vineet.Gupta1@synopsys.com> - 2015-11-17 14:40 +0100
              Re: [PATCH v2 18/19] ARC: [plat-eznps] replace sync with proper cpu  barrier Peter Zijlstra <peterz@infradead.org> - 2015-11-17 15:00 +0100

csiph-web