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Re: [RFC PATCH 1/2] genirq: Add runtime resume/suspend support for IRQ chips

From Jon Hunter <jonathanh@nvidia.com>
Newsgroups linux.kernel
Subject Re: [RFC PATCH 1/2] genirq: Add runtime resume/suspend support for IRQ chips
Date 2015-11-12 16:40 +0100
Message-ID <qu28G-2eq-25@gated-at.bofh.it> (permalink)
References (9 earlier) <qu06S-ZA-27@gated-at.bofh.it> <qu0gy-136-11@gated-at.bofh.it> <qu0qe-16P-3@gated-at.bofh.it> <qu0JA-1tl-19@gated-at.bofh.it> <qu1cD-1EX-43@gated-at.bofh.it>
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On 12/11/15 14:37, Lars-Peter Clausen wrote:
> On 11/12/2015 03:02 PM, Jon Hunter wrote:
> [...]
>>>>> One easy way out might be to always call pm_get/pm_but from
>>>>> bus_lock,/bus_unlock. This way the chip is guaranteed to be powered up when
>>>>> accessed happens. In addition pm_get is called when the IRQ is request and
>>>>> pm_put is called when the IRQ is release, this is to ensure the chip stays
>>>>> powered when it is actively monitoring the IRQ lines.
>>>>
>>>> Yes I had thought about that, but it is not quite that easy, because in
>>>> the case of request_irq() you don't want to pm_put() after the
>>>> bus_unlock(). However, the bus_lock/unlock() are good indicators of
>>>> different paths.
>>>
>>> You'd call pm_get() twice in request_irq() once from bus_lock() and once
>>> independently, that way you still have a reference even after the bus_unlock().
>>
>> Yes that is a possibility. However, there are places such as
>> show_interrupts() (kernel/irq/proc.c) and irq_gc_suspend() that do not
>> call bus_lock/unlock() which would need to be handled for PM. May be
>> these should also call bus_lock() as well?
> 
> show_interrupts() only accesses software state, not hardware state, or does it?

Good point. Today there only appears to be one user:

arch/powerpc/sysdev/fsl_msi.c:	.irq_print_chip = fsl_msi_print_chip,

This one is purely software. However, it would be easy to handle the
show_interrupts case if needed.

> suspend/resume is a bit tricky. It's kind of driver specific if it needs to
> actually access the hardware or whether the state is already shadowed in
> software. Maybe we can make this an exception for now and let drivers handle
> this on their own.

Yes I would agree with you on that.

Cheers
Jon

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Thread

[RFC PATCH 0/2] Add support for Tegra210 AGIC Jon Hunter <jonathanh@nvidia.com> - 2015-11-10 15:40 +0100
  [RFC PATCH 1/2] genirq: Add runtime resume/suspend support for IRQ chips Jon Hunter <jonathanh@nvidia.com> - 2015-11-10 15:50 +0100
    Re: [RFC PATCH 1/2] genirq: Add runtime resume/suspend support for  IRQ chips Thomas Gleixner <tglx@linutronix.de> - 2015-11-10 16:30 +0100
      Re: [RFC PATCH 1/2] genirq: Add runtime resume/suspend support for  IRQ chips Jon Hunter <jonathanh@nvidia.com> - 2015-11-10 17:00 +0100
        Re: [RFC PATCH 1/2] genirq: Add runtime resume/suspend support for  IRQ chips Grygorii Strashko <grygorii.strashko@ti.com> - 2015-11-10 17:50 +0100
          Re: [RFC PATCH 1/2] genirq: Add runtime resume/suspend support for  IRQ chips Lars-Peter Clausen <lars@metafoo.de> - 2015-11-10 19:10 +0100
            Re: [RFC PATCH 1/2] genirq: Add runtime resume/suspend support for  IRQ chips Jon Hunter <jonathanh@nvidia.com> - 2015-11-11 11:20 +0100
              Re: [RFC PATCH 1/2] genirq: Add runtime resume/suspend support for  IRQ chips Grygorii Strashko <grygorii.strashko@ti.com> - 2015-11-11 16:50 +0100
                Re: [RFC PATCH 1/2] genirq: Add runtime resume/suspend support for  IRQ chips Jon Hunter <jonathanh@nvidia.com> - 2015-11-12 12:00 +0100
                Re: [RFC PATCH 1/2] genirq: Add runtime resume/suspend support for  IRQ chips Lars-Peter Clausen <lars@metafoo.de> - 2015-11-12 14:30 +0100
                Re: [RFC PATCH 1/2] genirq: Add runtime resume/suspend support for  IRQ chips Jon Hunter <jonathanh@nvidia.com> - 2015-11-12 14:40 +0100
                Re: [RFC PATCH 1/2] genirq: Add runtime resume/suspend support for  IRQ chips Lars-Peter Clausen <lars@metafoo.de> - 2015-11-12 14:50 +0100
                Re: [RFC PATCH 1/2] genirq: Add runtime resume/suspend support for  IRQ chips Jon Hunter <jonathanh@nvidia.com> - 2015-11-12 15:10 +0100
                Re: [RFC PATCH 1/2] genirq: Add runtime resume/suspend support for  IRQ chips Lars-Peter Clausen <lars@metafoo.de> - 2015-11-12 15:40 +0100
                Re: [RFC PATCH 1/2] genirq: Add runtime resume/suspend support for  IRQ chips Jon Hunter <jonathanh@nvidia.com> - 2015-11-12 16:40 +0100
                Re: [RFC PATCH 1/2] genirq: Add runtime resume/suspend support for  IRQ chips Grygorii Strashko <grygorii.strashko@ti.com> - 2015-11-12 14:40 +0100
                Re: [RFC PATCH 1/2] genirq: Add runtime resume/suspend support for  IRQ chips Lars-Peter Clausen <lars@metafoo.de> - 2015-11-12 14:40 +0100
                Re: [RFC PATCH 1/2] genirq: Add runtime resume/suspend support for  IRQ chips Grygorii Strashko <grygorii.strashko@ti.com> - 2015-11-13 19:10 +0100
        Re: [RFC PATCH 1/2] genirq: Add runtime resume/suspend support for  IRQ chips Sören Brinkmann <soren.brinkmann@xilinx.com> - 2015-11-12 18:40 +0100
    Re: [RFC PATCH 1/2] genirq: Add runtime resume/suspend support for IRQ chips Kevin Hilman <khilman@kernel.org> - 2015-11-13 00:30 +0100
      Re: [RFC PATCH 1/2] genirq: Add runtime resume/suspend support for  IRQ chips Jon Hunter <jonathanh@nvidia.com> - 2015-11-13 10:10 +0100
        Re: [RFC PATCH 1/2] genirq: Add runtime resume/suspend support for  IRQ chips Thomas Gleixner <tglx@linutronix.de> - 2015-11-13 21:10 +0100
          Re: [RFC PATCH 1/2] genirq: Add runtime resume/suspend support for  IRQ chips Jon Hunter <jonathanh@nvidia.com> - 2015-11-16 10:50 +0100
            Re: [RFC PATCH 1/2] genirq: Add runtime resume/suspend support for  IRQ chips Geert Uytterhoeven <geert@linux-m68k.org> - 2015-11-16 10:50 +0100
              Re: [RFC PATCH 1/2] genirq: Add runtime resume/suspend support for  IRQ chips Jon Hunter <jonathanh@nvidia.com> - 2015-11-16 11:40 +0100
                Re: [RFC PATCH 1/2] genirq: Add runtime resume/suspend support for  IRQ chips Geert Uytterhoeven <geert@linux-m68k.org> - 2015-11-16 11:50 +0100

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