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[PATCH v3 05/10] thermal: rockchip: Add the sort flag for adc value increment or decrement

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The conversion table has the adc value and temperature.
In fact, the adc value only has the increment or decrement mode in
conversion table.

Moment, we can add the sort flag to be better support the *code_to_temp*
for differenr SoCs.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>

---

Changes in v3:
- rename the flag-> sort_flag.
- fix the indentation.
- change the pr_err information.

Changes in v2: None
Changes in v1: None

 drivers/thermal/rockchip_thermal.c | 68 +++++++++++++++++++++++++++++---------
 1 file changed, 53 insertions(+), 15 deletions(-)

diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
index 3116d07..c1ab346 100644
--- a/drivers/thermal/rockchip_thermal.c
+++ b/drivers/thermal/rockchip_thermal.c
@@ -53,6 +53,16 @@ enum sensor_id {
 };
 
 /**
+* The conversion table has the adc value and temperature.
+* ADC_DECREMENT is the adc value decremnet.(e.g. v2_code_table)
+* ADC_INCREMNET is the adc value incremnet.(e.g. v3_code_table)
+*/
+enum sort_flag {
+	ADC_DECREMENT = 0,
+	ADC_INCREMENT,
+};
+
+/**
  * The max sensors is two in rockchip SoCs.
  * Two sensors: CPU and GPU sensor.
  */
@@ -66,6 +76,9 @@ struct chip_tsadc_table {
 
 	/* that analogic mask data */
 	u32 data_mask;
+
+	/* the flag is adc value that increment or decrement in table */
+	bool sort_flag;
 };
 
 struct rockchip_tsadc_chip {
@@ -223,19 +236,43 @@ static int rk_tsadcv2_code_to_temp(struct chip_tsadc_table table, u32 code,
 
 	WARN_ON(table.length < 2);
 
-	code &= table.data_mask;
-	if (code < table.id[high].code)
-		return -EAGAIN;		/* Incorrect reading */
-
-	while (low <= high) {
-		if (code >= table.id[mid].code &&
-		    code < table.id[mid - 1].code)
-			break;
-		else if (code < table.id[mid].code)
-			low = mid + 1;
-		else
-			high = mid - 1;
-		mid = (low + high) / 2;
+	switch (table.sort_flag) {
+	case ADC_DECREMENT:
+		code &= table.data_mask;
+		if (code < table.id[high].code)
+			return -EAGAIN;		/* Incorrect reading */
+
+		while (low <= high) {
+			if (code >= table.id[mid].code &&
+			    code < table.id[mid - 1].code)
+				break;
+			else if (code < table.id[mid].code)
+				low = mid + 1;
+			else
+				high = mid - 1;
+
+			mid = (low + high) / 2;
+		}
+		break;
+	case ADC_INCREMENT:
+		code &= table.data_mask;
+		if (code < table.id[low].code)
+			return -EAGAIN;		/* Incorrect reading */
+
+		while (low <= high) {
+			if (code >= table.id[mid - 1].code &&
+			    code < table.id[mid].code)
+				break;
+			else if (code > table.id[mid].code)
+				low = mid + 1;
+			else
+				high = mid - 1;
+
+			mid = (low + high) / 2;
+		}
+		break;
+	default:
+		pr_err("Invalid the conversion table\n");
 	}
 
 	/*
@@ -245,8 +282,8 @@ static int rk_tsadcv2_code_to_temp(struct chip_tsadc_table table, u32 code,
 	 * to produce less granular result.
 	 */
 	num = table.id[mid].temp - v2_code_table[mid - 1].temp;
-	num *= table.id[mid - 1].code - code;
-	denom = table.id[mid - 1].code - table.id[mid].code;
+	num *= abs(table.id[mid - 1].code - code);
+	denom = abs(table.id[mid - 1].code - table.id[mid].code);
 	*temp = table.id[mid - 1].temp + (num / denom);
 
 	return 0;
@@ -367,6 +404,7 @@ static const struct rockchip_tsadc_chip rk3288_tsadc_data = {
 		.id = v2_code_table,
 		.length = ARRAY_SIZE(v2_code_table),
 		.data_mask = TSADCV2_DATA_MASK,
+		.sort_flag = ADC_DECREMENT,
 	},
 };
 
-- 
1.9.1

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[PATCH v3 00/10] Better compatible for the rockchip thermal and support RK3368 SoCs Caesar Wang <wxt@rock-chips.com> - 2015-11-08 10:30 +0100
  [PATCH v3 10/10] arm64: dts: Enable the Thermal on R88 board Caesar Wang <wxt@rock-chips.com> - 2015-11-08 10:30 +0100
    Re: [PATCH v3 10/10] arm64: dts: Enable the Thermal on R88 board kbuild test robot <lkp@intel.com> - 2015-11-08 14:50 +0100
  [PATCH v3 01/10] dt-bindings: rockchip-thermal: Support the RK3368 SoCs compatible Caesar Wang <wxt@rock-chips.com> - 2015-11-08 10:30 +0100
  [PATCH v3 06/10] thermal: rockchip: consistently use int for temperatures Caesar Wang <wxt@rock-chips.com> - 2015-11-08 10:30 +0100
  [PATCH v3 02/10] thermal: rockchip: better to compatible the driver for different SoCs Caesar Wang <wxt@rock-chips.com> - 2015-11-08 10:30 +0100
  [PATCH v3 04/10] thermal: rockchip: improve the conversion function Caesar Wang <wxt@rock-chips.com> - 2015-11-08 10:30 +0100
  [PATCH v3 07/10] thermal: rockchip: Support the RK3368 SoCs in thermal drivers Caesar Wang <wxt@rock-chips.com> - 2015-11-08 10:30 +0100
  [PATCH v3 05/10] thermal: rockchip: Add the sort flag for adc value increment or decrement Caesar Wang <wxt@rock-chips.com> - 2015-11-08 10:30 +0100
    Re: [PATCH v3 05/10] thermal: rockchip: Add the sort flag for adc  value increment or decrement kbuild test robot <lkp@intel.com> - 2015-11-08 10:50 +0100
  [PATCH v3 08/10] arm64: dts: Add the thermal data found on RK3368 Caesar Wang <wxt@rock-chips.com> - 2015-11-08 10:30 +0100
  [PATCH v3 09/10] arm64: dts: Add main Thermal info to rk3368.dtsi Caesar Wang <wxt@rock-chips.com> - 2015-11-08 10:30 +0100
  [PATCH v3 03/10] thermal: rockchip: trivial: fix typo in commit Caesar Wang <wxt@rock-chips.com> - 2015-11-08 10:40 +0100

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