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Re: [PATCH] mtd: spi-nor: fsl-quadspi: add big-endian support

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On Fri, Oct 23, 2015 at 5:53 AM, Yuan Yao <yao.yuan@freescale.com> wrote:

>  /*
> + * R/W functions for big- or little-endian registers:
> + * The qSPI controller's endian is independent of the CPU core's endian.
> + * So far, although the CPU core is little-endian but the qSPI have two
> + * versions for big-endian and little-endian.
> + */
> +static void qspi_writel(struct fsl_qspi *q, u32 val, void __iomem *addr)
> +{
> +       if (q->big_endian)
> +               iowrite32be(val, addr);
> +       else
> +               iowrite32(val, addr);
> +}

I suggest you to implement regmap support for this driver instead.

Take a look at drivers/watchdog/imx2_wdt.c for a reference.

Then you only need to pass 'big-endian' as a property for the qspi in
the .dtsi file and regmap core will take care of endianness.
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Re: [PATCH] mtd: spi-nor: fsl-quadspi: add big-endian support Fabio Estevam <festevam@gmail.com> - 2015-10-24 17:50 +0200
  RE: [PATCH] mtd: spi-nor: fsl-quadspi: add big-endian support Yao Yuan <yao.yuan@freescale.com> - 2015-10-30 10:50 +0100

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