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Groups > linux.kernel > #1251275
| From | Ling Ma <ling.ma.program@gmail.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | Re: [RFC PATCH] qspinlock: Improve performance by reducing load instruction rollback |
| Date | 2015-10-20 05:10 +0200 |
| Message-ID | <qlvtf-7OS-1@gated-at.bofh.it> (permalink) |
| References | <ql8n0-7wA-19@gated-at.bofh.it> <qlfeO-xB-19@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
2015-10-19 17:46 GMT+08:00 Peter Zijlstra <peterz@infradead.org>: > On Mon, Oct 19, 2015 at 10:27:22AM +0800, ling.ma.program@gmail.com wrote: >> From: Ma Ling <ling.ml@alibaba-inc.com> >> >> All load instructions can run speculatively but they have to follow >> memory order rule in multiple cores as below: >> _x = _y = 0 >> >> Processor 0 Processor 1 >> >> mov r1, [ _y] //M1 mov [ _x], 1 //M3 >> mov r2, [ _x] //M2 mov [ _y], 1 //M4 >> >> If r1 = 1, r2 must be 1 >> >> In order to guarantee above rule, although Processor 0 execute >> M1 and M2 instruction out of order, they are kept in ROB, >> when load buffer for _x in Processor 0 received the update >> message from Processor 1, Processor 0 need to roll back >> from M2 instruction, which will flush the whole pipeline, >> the latency is over the penalty from branch prediction miss. >> >> In this patch we use lock cmpxchg instruction to force load > > "lock cmpxchg" makes me think you're working on x86. > >> instructions to be serialization, > > smp_rmb() does that, and that's 'free' on x86. Because x86 doesn't do > read reordering. > >> the destination operand >> receives a write cycle without regard to the result of >> the comparison, which can help us to reduce the penalty >> from load instruction roll back. > > And that makes me think I'm not understanding what you're getting at. If > you need to force memory order, a "fence" (or smp_mb()) would still be > cheaper than endlessly pulling the line into exclusive state for no > reason, right? > >> Our experiment indicates the performance can be improved by 10%~15% >> for 2 and 3 threads cases, the conflicts from lock cache line >> spend them most of the time. > > That just doesn't parse, what? When the thread number is 2 or 3, only lock cache line will generate conflicts, and cost them the most of the time. Thanks Ling -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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[RFC PATCH] qspinlock: Improve performance by reducing load instruction rollback ling.ma.program@gmail.com - 2015-10-19 04:30 +0200
Re: [RFC PATCH] qspinlock: Improve performance by reducing load instruction rollback Ingo Molnar <mingo@kernel.org> - 2015-10-19 10:00 +0200
Re: [RFC PATCH] qspinlock: Improve performance by reducing load instruction rollback Peter Zijlstra <peterz@infradead.org> - 2015-10-19 11:40 +0200
Re: [RFC PATCH] qspinlock: Improve performance by reducing load instruction rollback Ingo Molnar <mingo@kernel.org> - 2015-10-19 13:30 +0200
Re: [RFC PATCH] qspinlock: Improve performance by reducing load instruction rollback Waiman Long <waiman.long@hpe.com> - 2015-10-19 19:30 +0200
Re: [RFC PATCH] qspinlock: Improve performance by reducing load instruction rollback Ling Ma <ling.ma.program@gmail.com> - 2015-10-20 05:00 +0200
Re: [RFC PATCH] qspinlock: Improve performance by reducing load instruction rollback Ingo Molnar <mingo@kernel.org> - 2015-10-20 10:50 +0200
Re: [RFC PATCH] qspinlock: Improve performance by reducing load instruction rollback Ling Ma <ling.ma.program@gmail.com> - 2015-10-21 07:30 +0200
Re: [RFC PATCH] qspinlock: Improve performance by reducing load instruction rollback Peter Zijlstra <peterz@infradead.org> - 2015-10-20 11:20 +0200
Re: [RFC PATCH] qspinlock: Improve performance by reducing load instruction rollback Peter Zijlstra <peterz@infradead.org> - 2015-10-19 11:40 +0200
Re: [RFC PATCH] qspinlock: Improve performance by reducing load instruction rollback Waiman Long <waiman.long@hpe.com> - 2015-10-19 19:30 +0200
Re: [RFC PATCH] qspinlock: Improve performance by reducing load instruction rollback Ling Ma <ling.ma.program@gmail.com> - 2015-10-20 05:10 +0200
Re: [RFC PATCH] qspinlock: Improve performance by reducing load instruction rollback Peter Zijlstra <peterz@infradead.org> - 2015-10-19 11:50 +0200
Re: [RFC PATCH] qspinlock: Improve performance by reducing load instruction rollback Ling Ma <ling.ma.program@gmail.com> - 2015-10-20 05:10 +0200
Re: [RFC PATCH] qspinlock: Improve performance by reducing load instruction rollback Ling Ma <ling.ma.program@gmail.com> - 2015-10-20 05:30 +0200
Re: [RFC PATCH] qspinlock: Improve performance by reducing load instruction rollback Peter Zijlstra <peterz@infradead.org> - 2015-10-20 11:20 +0200
Re: [RFC PATCH] qspinlock: Improve performance by reducing load instruction rollback Ling Ma <ling.ma.program@gmail.com> - 2015-10-21 07:40 +0200
Re: [RFC PATCH] qspinlock: Improve performance by reducing load instruction rollback Waiman Long <waiman.long@hpe.com> - 2015-10-19 19:20 +0200
Re: [RFC PATCH] qspinlock: Improve performance by reducing load instruction rollback Ling Ma <ling.ma.program@gmail.com> - 2015-10-20 05:20 +0200
Re: [RFC PATCH] qspinlock: Improve performance by reducing load instruction rollback Waiman Long <waiman.long@hpe.com> - 2015-10-20 21:00 +0200
Re: [RFC PATCH] qspinlock: Improve performance by reducing load instruction rollback Ling Ma <ling.ma.program@gmail.com> - 2015-10-21 07:50 +0200
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