Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]
Groups > linux.kernel > #1252459
| From | Doug Anderson <dianders@chromium.org> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | Re: [PATCH v1 2/2] ARM: dts: rockchip: Add the OTP gpio pinctrl |
| Date | 2015-10-21 06:30 +0200 |
| Message-ID | <qlTce-ll-5@gated-at.bofh.it> (permalink) |
| References | <qlRDr-6mE-3@gated-at.bofh.it> <qlRDr-6mE-1@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
Caesar, On Tue, Oct 20, 2015 at 7:43 PM, Caesar Wang <wxt@rock-chips.com> wrote: > We need the OTP pin is gpio state before resetting the TSADC controller, > since the tshut polarity will generate a high signal. It might or might not be "high" depending on polarity, right? It's just possible that it could glitch during probe. Other than that nit, this seems fine to me. If it's not too much trouble it'd be nice if you could spin with the description change. Otherwise: Reviewed-by: Douglas Anderson <dianders@chromium.org> -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Back to linux.kernel | Previous | Next — Previous in thread | Next in thread | Find similar | Unroll thread
[PATCH v1 2/2] ARM: dts: rockchip: Add the OTP gpio pinctrl Caesar Wang <wxt@rock-chips.com> - 2015-10-21 04:50 +0200
Re: [PATCH v1 2/2] ARM: dts: rockchip: Add the OTP gpio pinctrl Doug Anderson <dianders@chromium.org> - 2015-10-21 06:30 +0200
Re: [PATCH v1 2/2] ARM: dts: rockchip: Add the OTP gpio pinctrl Doug Anderson <dianders@chromium.org> - 2015-10-21 15:40 +0200
csiph-web