[PATCH V2 13/30] coresight: etm3x: implementing perf_enable/disable() API

From	Mathieu Poirier <mathieu.poirier@linaro.org>
Newsgroups	linux.kernel
Subject	[PATCH V2 13/30] coresight: etm3x: implementing perf_enable/disable() API
Date	2015-10-18 20:40 +0200
Message-ID	<ql12a-500-37@gated-at.bofh.it> (permalink)
References	<ql0St-4NE-3@gated-at.bofh.it>
Organization	linux.* mail to news gateway

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That way traces can be enable and disabled automatically
from the Perf subystem using the PMU abstraction.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
---
 drivers/hwtracing/coresight/coresight-etm3x.c | 50 ++++++++++++++++++++++++---
 include/linux/coresight.h                     |  4 +++
 2 files changed, 50 insertions(+), 4 deletions(-)

diff --git a/drivers/hwtracing/coresight/coresight-etm3x.c b/drivers/hwtracing/coresight/coresight-etm3x.c
index 0994bf0a8334..f565554744fe 100644
--- a/drivers/hwtracing/coresight/coresight-etm3x.c
+++ b/drivers/hwtracing/coresight/coresight-etm3x.c
@@ -369,8 +369,10 @@ static void etm_enable_hw(void *info)
 	etm_set_prog(drvdata);
 
 	etmcr = etm_readl(drvdata, ETMCR);
-	etmcr &= (ETMCR_PWD_DWN | ETMCR_ETM_PRG);
+	/* Clear setting from a previous run if need be */
+	etmcr &= ~ETM3X_SUPPORTED_OPTIONS;
 	etmcr |= drvdata->port_size;
+	etmcr |= ETMCR_ETM_EN;
 	etm_writel(drvdata, config->ctrl | etmcr, ETMCR);
 	etm_writel(drvdata, config->trigger_event, ETMTRIGGER);
 	etm_writel(drvdata, config->startstop_ctrl, ETMTSSCR);
@@ -410,9 +412,6 @@ static void etm_enable_hw(void *info)
 	/* No VMID comparator value selected */
 	etm_writel(drvdata, 0x0, ETMVMIDCVR);
 
-	/* Ensures trace output is enabled from this ETM */
-	etm_writel(drvdata, config->ctrl | ETMCR_ETM_EN | etmcr, ETMCR);
-
 	etm_clr_prog(drvdata);
 	CS_LOCK(drvdata->base);
 
@@ -485,6 +484,47 @@ static void perf_etm_set_config(struct coresight_device *csdev, void *config)
 	drvdata->config = config;
 }
 
+static int perf_etm_enable(struct coresight_device *csdev)
+{
+	struct etm_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
+
+	if (WARN_ON_ONCE(drvdata->cpu != smp_processor_id()))
+		return -EINVAL;
+
+	if (local_cmpxchg(&drvdata->state,
+			  ETM_STATE_DISABLED, ETM_STATE_PERF))
+		return -EBUSY;
+
+	etm_enable_hw(drvdata);
+
+	return 0;
+}
+
+static int perf_etm_disable(struct coresight_device *csdev)
+{
+	struct etm_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
+
+	if (WARN_ON_ONCE(drvdata->cpu != smp_processor_id()))
+		return -EINVAL;
+
+	CS_UNLOCK(drvdata->base);
+
+	/* setting the prog bit disables tracing immediately */
+	etm_set_prog(drvdata);
+	/* Get ready for another session */
+	drvdata->config = NULL;
+	/*
+	 * There is no way to know when the tracer will be used again so
+	 * power down the tracer.
+	 */
+	etm_set_pwrdwn(drvdata);
+	local_set(&drvdata->state, ETM_STATE_DISABLED);
+
+	CS_LOCK(drvdata->base);
+
+	return 0;
+}
+
 static int sysfs_etm_enable(struct coresight_device *csdev)
 {
 	struct etm_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
@@ -587,6 +627,8 @@ static const struct coresight_ops_source etm_source_ops = {
 	.trace_id		= etm_trace_id,
 	.perf_get_config	= perf_etm_get_config,
 	.perf_set_config	= perf_etm_set_config,
+	.perf_enable		= perf_etm_enable,
+	.perf_disable		= perf_etm_disable,
 	.sysfs_enable		= sysfs_etm_enable,
 	.sysfs_disable		= sysfs_etm_disable,
 };
diff --git a/include/linux/coresight.h b/include/linux/coresight.h
index 32463da877eb..b853d722346b 100644
--- a/include/linux/coresight.h
+++ b/include/linux/coresight.h
@@ -211,6 +211,8 @@ struct coresight_ops_link {
 			to the HW.
  * @perf_get_config:	builds the ETM configuration after event' specifics.
  * @perf_set_config:	associate a tracer with a configuration..
+ * @perf_enable:	enables tracing for a source, from Perf.
+ * @perf_disable:	disables tracing for a source, from Perf.
  * @sysfs_enable:	enables tracing for a source, from sysFS.
  * @sysfs_disable:	disables tracing for a source, from sysFS.
  */
@@ -220,6 +222,8 @@ struct coresight_ops_source {
 	void *(*perf_get_config)(struct coresight_device *csdev,
 				 struct perf_event *event);
 	void (*perf_set_config)(struct coresight_device *csdev, void *config);
+	int (*perf_enable)(struct coresight_device *csdev);
+	int (*perf_disable)(struct coresight_device *csdev);
 	int (*sysfs_enable)(struct coresight_device *csdev);
 	void (*sysfs_disable)(struct coresight_device *csdev);
 };
-- 
1.9.1

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Thread

[PATCH V2 00/30] Coresight integration with perf Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-10-18 20:30 +0200
  [PATCH V2 18/30] coresight: etb10: moving to local atomic operations Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-10-18 20:30 +0200
  [PATCH V2 30/30] perf tools: adding coresight etm PMU record capabilities Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-10-18 20:30 +0200
  [PATCH V2 19/30] coresight: etb10: implementing the setup_aux() API Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-10-18 20:30 +0200
    Re: [PATCH V2 19/30] coresight: etb10: implementing the setup_aux() API Alexander Shishkin <alexander.shishkin@linux.intel.com> - 2015-10-19 15:50 +0200
      Re: [PATCH V2 19/30] coresight: etb10: implementing the setup_aux() API Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-10-20 18:50 +0200
    Re: [PATCH V2 19/30] coresight: etb10: implementing the setup_aux() API Alexander Shishkin <alexander.shishkin@linux.intel.com> - 2015-10-20 13:50 +0200
  [PATCH V2 07/30] coresight: etm3x: moving etm_drvdata::enable to atomic field Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-10-18 20:30 +0200
  [PATCH V2 05/30] coresight: etm3x: set progbit to stop trace collection Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-10-18 20:30 +0200
  [PATCH V2 22/30] coresight: etm-perf: new PMU driver for ETM tracers Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-10-18 20:30 +0200
    Re: [PATCH V2 22/30] coresight: etm-perf: new PMU driver for ETM tracers Alexander Shishkin <alexander.shishkin@linux.intel.com> - 2015-10-19 17:50 +0200
      Re: [PATCH V2 22/30] coresight: etm-perf: new PMU driver for ETM tracers Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-10-20 18:50 +0200
    Re: [PATCH V2 22/30] coresight: etm-perf: new PMU driver for ETM tracers Alexander Shishkin <alexander.shishkin@linux.intel.com> - 2015-10-20 11:40 +0200
      Re: [PATCH V2 22/30] coresight: etm-perf: new PMU driver for ETM tracers Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-10-20 21:20 +0200
  [PATCH V2 25/30] perf tools: adding perf_session to *info_prive_size() Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-10-18 20:30 +0200
  [PATCH V2 10/30] coresight: etm3x: consolidating initial config Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-10-18 20:30 +0200
  [PATCH V2 26/30] perf tools: making source devices path broadly accessible Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-10-18 20:30 +0200
  [PATCH V2 21/30] coresight: etb10: implementing buffer update API Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-10-18 20:30 +0200
  [PATCH V2 15/30] coresight: making coresight_build_paths() public Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-10-18 20:40 +0200
  [PATCH V2 08/30] coresight: etm3x: implementing 'cpu_id()' API Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-10-18 20:40 +0200
  [PATCH V2 17/30] perf: changing pmu::setup_aux() parameter to include event Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-10-18 20:40 +0200
    Re: [PATCH V2 17/30] perf: changing pmu::setup_aux() parameter to include event Alexander Shishkin <alexander.shishkin@linux.intel.com> - 2015-10-19 15:40 +0200
  [PATCH V2 06/30] coresight: clearly labeling source operarions Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-10-18 20:40 +0200
  [PATCH V2 12/30] coresight: etm3x: adding perf_get/set_config() API Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-10-18 20:40 +0200
  [PATCH V2 03/30] coresight: etm3x: unlocking tracers in default arch init Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-10-18 20:40 +0200
  [PATCH V2 11/30] coresight: etm3x: implementing user/kernel mode tracing Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-10-18 20:40 +0200
  [PATCH V2 09/30] coresight: etm3x: changing default trace configuration Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-10-18 20:40 +0200
  [PATCH V2 01/30] coresight: etm3x: moving etm_readl/writel to header file Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-10-18 20:40 +0200
    Re: [PATCH V2 01/30] coresight: etm3x: moving etm_readl/writel to  header file Greg KH <gregkh@linuxfoundation.org> - 2015-10-19 20:40 +0200
  [PATCH V2 13/30] coresight: etm3x: implementing perf_enable/disable() API Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-10-18 20:40 +0200

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