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Groups > linux.kernel > #1250212
| From | Mathieu Poirier <mathieu.poirier@linaro.org> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | [PATCH V2 01/30] coresight: etm3x: moving etm_readl/writel to header file |
| Date | 2015-10-18 20:40 +0200 |
| Message-ID | <ql12a-500-27@gated-at.bofh.it> (permalink) |
| References | <ql0St-4NE-3@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
Moving functions etm_readl/writel to file "coresight-etm.h"
for access by code outside of the main ETM3x driver.
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
---
drivers/hwtracing/coresight/coresight-etm.h | 29 +++++++++++++++++++++++++++
drivers/hwtracing/coresight/coresight-etm3x.c | 29 ---------------------------
2 files changed, 29 insertions(+), 29 deletions(-)
diff --git a/drivers/hwtracing/coresight/coresight-etm.h b/drivers/hwtracing/coresight/coresight-etm.h
index b4481eb29304..34f7db881fa7 100644
--- a/drivers/hwtracing/coresight/coresight-etm.h
+++ b/drivers/hwtracing/coresight/coresight-etm.h
@@ -251,4 +251,33 @@ enum etm_addr_type {
ETM_ADDR_TYPE_START,
ETM_ADDR_TYPE_STOP,
};
+
+static inline void etm_writel(struct etm_drvdata *drvdata,
+ u32 val, u32 off)
+{
+ if (drvdata->use_cp14) {
+ if (etm_writel_cp14(off, val)) {
+ dev_err(drvdata->dev,
+ "invalid CP14 access to ETM reg: %#x", off);
+ }
+ } else {
+ writel_relaxed(val, drvdata->base + off);
+ }
+}
+
+static inline unsigned int etm_readl(struct etm_drvdata *drvdata, u32 off)
+{
+ u32 val;
+
+ if (drvdata->use_cp14) {
+ if (etm_readl_cp14(off, &val)) {
+ dev_err(drvdata->dev,
+ "invalid CP14 access to ETM reg: %#x", off);
+ }
+ } else {
+ val = readl_relaxed(drvdata->base + off);
+ }
+
+ return val;
+}
#endif
diff --git a/drivers/hwtracing/coresight/coresight-etm3x.c b/drivers/hwtracing/coresight/coresight-etm3x.c
index d630b7ece735..c1dc095c3fb0 100644
--- a/drivers/hwtracing/coresight/coresight-etm3x.c
+++ b/drivers/hwtracing/coresight/coresight-etm3x.c
@@ -42,35 +42,6 @@ module_param_named(boot_enable, boot_enable, int, S_IRUGO);
static int etm_count;
static struct etm_drvdata *etmdrvdata[NR_CPUS];
-static inline void etm_writel(struct etm_drvdata *drvdata,
- u32 val, u32 off)
-{
- if (drvdata->use_cp14) {
- if (etm_writel_cp14(off, val)) {
- dev_err(drvdata->dev,
- "invalid CP14 access to ETM reg: %#x", off);
- }
- } else {
- writel_relaxed(val, drvdata->base + off);
- }
-}
-
-static inline unsigned int etm_readl(struct etm_drvdata *drvdata, u32 off)
-{
- u32 val;
-
- if (drvdata->use_cp14) {
- if (etm_readl_cp14(off, &val)) {
- dev_err(drvdata->dev,
- "invalid CP14 access to ETM reg: %#x", off);
- }
- } else {
- val = readl_relaxed(drvdata->base + off);
- }
-
- return val;
-}
-
/*
* Memory mapped writes to clear os lock are not supported on some processors
* and OS lock must be unlocked before any memory mapped access on such
--
1.9.1
--
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[PATCH V2 00/30] Coresight integration with perf Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-10-18 20:30 +0200
[PATCH V2 18/30] coresight: etb10: moving to local atomic operations Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-10-18 20:30 +0200
[PATCH V2 30/30] perf tools: adding coresight etm PMU record capabilities Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-10-18 20:30 +0200
[PATCH V2 19/30] coresight: etb10: implementing the setup_aux() API Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-10-18 20:30 +0200
Re: [PATCH V2 19/30] coresight: etb10: implementing the setup_aux() API Alexander Shishkin <alexander.shishkin@linux.intel.com> - 2015-10-19 15:50 +0200
Re: [PATCH V2 19/30] coresight: etb10: implementing the setup_aux() API Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-10-20 18:50 +0200
Re: [PATCH V2 19/30] coresight: etb10: implementing the setup_aux() API Alexander Shishkin <alexander.shishkin@linux.intel.com> - 2015-10-20 13:50 +0200
[PATCH V2 07/30] coresight: etm3x: moving etm_drvdata::enable to atomic field Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-10-18 20:30 +0200
[PATCH V2 05/30] coresight: etm3x: set progbit to stop trace collection Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-10-18 20:30 +0200
[PATCH V2 22/30] coresight: etm-perf: new PMU driver for ETM tracers Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-10-18 20:30 +0200
Re: [PATCH V2 22/30] coresight: etm-perf: new PMU driver for ETM tracers Alexander Shishkin <alexander.shishkin@linux.intel.com> - 2015-10-19 17:50 +0200
Re: [PATCH V2 22/30] coresight: etm-perf: new PMU driver for ETM tracers Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-10-20 18:50 +0200
Re: [PATCH V2 22/30] coresight: etm-perf: new PMU driver for ETM tracers Alexander Shishkin <alexander.shishkin@linux.intel.com> - 2015-10-20 11:40 +0200
Re: [PATCH V2 22/30] coresight: etm-perf: new PMU driver for ETM tracers Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-10-20 21:20 +0200
[PATCH V2 25/30] perf tools: adding perf_session to *info_prive_size() Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-10-18 20:30 +0200
[PATCH V2 10/30] coresight: etm3x: consolidating initial config Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-10-18 20:30 +0200
[PATCH V2 26/30] perf tools: making source devices path broadly accessible Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-10-18 20:30 +0200
[PATCH V2 21/30] coresight: etb10: implementing buffer update API Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-10-18 20:30 +0200
[PATCH V2 15/30] coresight: making coresight_build_paths() public Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-10-18 20:40 +0200
[PATCH V2 08/30] coresight: etm3x: implementing 'cpu_id()' API Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-10-18 20:40 +0200
[PATCH V2 17/30] perf: changing pmu::setup_aux() parameter to include event Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-10-18 20:40 +0200
Re: [PATCH V2 17/30] perf: changing pmu::setup_aux() parameter to include event Alexander Shishkin <alexander.shishkin@linux.intel.com> - 2015-10-19 15:40 +0200
[PATCH V2 06/30] coresight: clearly labeling source operarions Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-10-18 20:40 +0200
[PATCH V2 12/30] coresight: etm3x: adding perf_get/set_config() API Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-10-18 20:40 +0200
[PATCH V2 03/30] coresight: etm3x: unlocking tracers in default arch init Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-10-18 20:40 +0200
[PATCH V2 11/30] coresight: etm3x: implementing user/kernel mode tracing Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-10-18 20:40 +0200
[PATCH V2 09/30] coresight: etm3x: changing default trace configuration Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-10-18 20:40 +0200
[PATCH V2 01/30] coresight: etm3x: moving etm_readl/writel to header file Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-10-18 20:40 +0200
Re: [PATCH V2 01/30] coresight: etm3x: moving etm_readl/writel to header file Greg KH <gregkh@linuxfoundation.org> - 2015-10-19 20:40 +0200
[PATCH V2 13/30] coresight: etm3x: implementing perf_enable/disable() API Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-10-18 20:40 +0200
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