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Re: [PATCH v5 2/6] irqchip, gicv3: Workaround for Cavium ThunderX erratum 23154

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On Mon, 21 Sep 2015 22:58:35 +0200
Robert Richter <rric@kernel.org> wrote:

> From: Robert Richter <rrichter@cavium.com>
> 
> This patch implements Cavium ThunderX erratum 23154.
> 
> The gicv3 of ThunderX requires a modified version for reading the IAR
> status to ensure data synchronization. Since this is in the fast-path
> and called with each interrupt, runtime patching is used using jump
> label patching for smallest overhead (no-op). This is the same
> technique as used for tracepoints.
> 
> v5:
>  * fixed calling gic_read_iar_cavium_thunderx() if jump label is
>    enabled
>  * made is_cavium_thunderx static
>  * removed ARCH_THUNDER dependency for Cavium errata options to
>    make it available for generic kernels
> 
> v4:
>  * simplify code to only use cpus_have_cap() in gicv3_enable_quirks()
> 
> v3:
>  * fix erratum to be dependend from midr
>  * use arm64 errata framework
> 
> v2:
>  * implement code in a single asm() to keep instruction sequence
>  * added comment to the code that explains the erratum
>  * apply workaround also if running as guest, thus check MIDR
> 
> Signed-off-by: Robert Richter <rrichter@cavium.com>

Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>

	M.
-- 
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[PATCH v5 0/6] irqchip, gicv3: Updates and Cavium ThunderX errata workarounds Robert Richter <rric@kernel.org> - 2015-09-21 23:00 +0200
  [PATCH v5 4/6] irqchip, gicv3-its: Add HW revision detection and configuration Robert Richter <rric@kernel.org> - 2015-09-21 23:10 +0200
    Re: [PATCH v5 4/6] irqchip, gicv3-its: Add HW revision detection  and configuration Marc Zyngier <marc.zyngier@arm.com> - 2015-09-22 19:00 +0200
    [tip:irq/core] irqchip/gicv3-its:   Add HW revision detection and configuration tip-bot for Robert Richter <tipbot@zytor.com> - 2015-09-29 10:20 +0200
  [PATCH v5 1/6] irqchip, gicv3-its: Add range check for number of allocated pages Robert Richter <rric@kernel.org> - 2015-09-21 23:10 +0200
    [tip:irq/core] irqchip/gicv3-its:   Add range check for number of allocated pages tip-bot for Robert Richter <tipbot@zytor.com> - 2015-09-29 10:20 +0200
  [PATCH v5 2/6] irqchip, gicv3: Workaround for Cavium ThunderX erratum 23154 Robert Richter <rric@kernel.org> - 2015-09-21 23:10 +0200
    Re: [PATCH v5 2/6] irqchip, gicv3: Workaround for Cavium ThunderX  erratum 23154 Marc Zyngier <marc.zyngier@arm.com> - 2015-09-22 19:00 +0200
    [tip:irq/core] irqchip/gicv3:   Workaround for Cavium ThunderX erratum 23154 tip-bot for Robert Richter <tipbot@zytor.com> - 2015-09-29 10:20 +0200
  Re: [PATCH v5 0/6] irqchip, gicv3: Updates and Cavium ThunderX  errata workarounds Marc Zyngier <marc.zyngier@arm.com> - 2015-09-22 19:00 +0200
    Re: [PATCH v5 0/6] irqchip, gicv3: Updates and Cavium ThunderX  errata workarounds Marc Zyngier <marc.zyngier@arm.com> - 2015-09-22 20:10 +0200
      Re: [PATCH v5 0/6] irqchip, gicv3: Updates and Cavium ThunderX  errata workarounds Will Deacon <will.deacon@arm.com> - 2015-09-22 20:30 +0200
        Re: [PATCH v5 0/6] irqchip, gicv3: Updates and Cavium ThunderX  errata workarounds Marc Zyngier <marc.zyngier@arm.com> - 2015-09-22 21:50 +0200
          Re: [PATCH v5 0/6] irqchip, gicv3: Updates and Cavium ThunderX  errata workarounds Catalin Marinas <catalin.marinas@arm.com> - 2015-09-24 19:00 +0200

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