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Groups > linux.kernel > #1320490
| From | Eric Auger <eric.auger@linaro.org> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | Re: [PATCH 00/10] KVM PCIe/MSI passthrough on ARM/ARM64 |
| Date | 2016-01-28 11:00 +0100 |
| Message-ID | <qVRwT-1wL-23@gated-at.bofh.it> (permalink) |
| References | <qVbHj-4Dq-7@gated-at.bofh.it> <qVfBh-7mT-29@gated-at.bofh.it> <qVu7h-TW-25@gated-at.bofh.it> <qVP21-8nH-3@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
Hi Pavel, On 01/28/2016 08:13 AM, Pavel Fedin wrote: > Hello! > >> x86 isn't problem-free in this space. An x86 VM is going to know that >> the 0xfee00000 address range is special, it won't be backed by RAM and >> won't be a DMA target, thus we'll never attempt to map it for an iova >> address. However, if we run a non-x86 VM or a userspace driver, it >> doesn't necessarily know that there's anything special about that range >> of iovas. I intend to resolve this with an extension to the iommu info >> ioctl that describes the available iova space for the iommu. The >> interrupt region would simply be excluded. > > I see now, but i still don't understand how it would work. How can we tell the guest OS that we cannot do DMA to this particular > area? Just exclude it from RAM at all? But this means we would have to modify machine's model... > I know that this is a bit different story from what we are implementing now. Just curious. Well in QEMU mach-virt we have a static guest PA memory map. Maybe in some other virt machines this is different and it is possible to take into account the fact an IOVA range cannot be used? Regards Eric > > Kind regards, > Pavel Fedin > Senior Engineer > Samsung Electronics Research center Russia > >
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[PATCH 00/10] KVM PCIe/MSI passthrough on ARM/ARM64 Eric Auger <eric.auger@linaro.org> - 2016-01-26 14:20 +0100
[PATCH 09/10] vfio-pci: create an iommu mapping for msi address Eric Auger <eric.auger@linaro.org> - 2016-01-26 14:20 +0100
[PATCH 01/10] iommu: Add DOMAIN_ATTR_MSI_MAPPING attribute Eric Auger <eric.auger@linaro.org> - 2016-01-26 14:20 +0100
[PATCH 05/10] vfio/type1: attach a reserved iova domain to vfio_domain Eric Auger <eric.auger@linaro.org> - 2016-01-26 14:20 +0100
[PATCH 10/10] vfio: allow the user to register reserved iova range for MSI mapping Eric Auger <eric.auger@linaro.org> - 2016-01-26 14:20 +0100
Re: [PATCH 10/10] vfio: allow the user to register reserved iova range for MSI mapping kbuild test robot <lkp@intel.com> - 2016-01-26 17:50 +0100
Re: [PATCH 10/10] vfio: allow the user to register reserved iova range for MSI mapping kbuild test robot <lkp@intel.com> - 2016-01-26 19:40 +0100
[PATCH 06/10] vfio: introduce vfio_group_alloc_map_/unmap_free_reserved_iova Eric Auger <eric.auger@linaro.org> - 2016-01-26 14:20 +0100
Re: [PATCH 06/10] vfio: introduce vfio_group_alloc_map_/unmap_free_reserved_iova kbuild test robot <lkp@intel.com> - 2016-01-26 17:20 +0100
Re: [PATCH 06/10] vfio: introduce vfio_group_alloc_map_/unmap_free_reserved_iova Eric Auger <eric.auger@linaro.org> - 2016-01-26 17:40 +0100
[PATCH 08/10] vfio: introduce vfio_group_require_msi_mapping Eric Auger <eric.auger@linaro.org> - 2016-01-26 14:20 +0100
[PATCH 04/10] vfio: introduce VFIO_IOVA_RESERVED vfio_dma type Eric Auger <eric.auger@linaro.org> - 2016-01-26 14:20 +0100
[PATCH 03/10] vfio_iommu_type1: add reserved binding RB tree management Eric Auger <eric.auger@linaro.org> - 2016-01-26 14:20 +0100
[PATCH 02/10] vfio: expose MSI mapping requirement through VFIO_IOMMU_GET_INFO Eric Auger <eric.auger@linaro.org> - 2016-01-26 14:20 +0100
RE: [PATCH 00/10] KVM PCIe/MSI passthrough on ARM/ARM64 Pavel Fedin <p.fedin@samsung.com> - 2016-01-26 18:30 +0100
Re: [PATCH 00/10] KVM PCIe/MSI passthrough on ARM/ARM64 Eric Auger <eric.auger@linaro.org> - 2016-01-27 10:00 +0100
RE: [PATCH 00/10] KVM PCIe/MSI passthrough on ARM/ARM64 Pavel Fedin <p.fedin@samsung.com> - 2016-01-28 08:20 +0100
Re: [PATCH 00/10] KVM PCIe/MSI passthrough on ARM/ARM64 Eric Auger <eric.auger@linaro.org> - 2016-01-28 11:00 +0100
Re: [PATCH 00/10] KVM PCIe/MSI passthrough on ARM/ARM64 Alex Williamson <alex.williamson@redhat.com> - 2016-01-28 23:00 +0100
Re: [PATCH 00/10] KVM PCIe/MSI passthrough on ARM/ARM64 Eric Auger <eric.auger@linaro.org> - 2016-01-29 15:40 +0100
Re: [PATCH 00/10] KVM PCIe/MSI passthrough on ARM/ARM64 Alex Williamson <alex.williamson@redhat.com> - 2016-01-29 20:40 +0100
Re: [PATCH 00/10] KVM PCIe/MSI passthrough on ARM/ARM64 Eric Auger <eric.auger@linaro.org> - 2016-01-29 22:30 +0100
Re: [PATCH 00/10] KVM PCIe/MSI passthrough on ARM/ARM64 Will Deacon <will.deacon@arm.com> - 2016-02-01 15:10 +0100
Re: [PATCH 00/10] KVM PCIe/MSI passthrough on ARM/ARM64 Christoffer Dall <christoffer.dall@linaro.org> - 2016-02-03 14:00 +0100
Re: [PATCH 00/10] KVM PCIe/MSI passthrough on ARM/ARM64 Will Deacon <will.deacon@arm.com> - 2016-02-03 14:20 +0100
Re: [PATCH 00/10] KVM PCIe/MSI passthrough on ARM/ARM64 Christoffer Dall <christoffer.dall@linaro.org> - 2016-02-03 16:40 +0100
ARM PCI/MSI KVM passthrough with GICv2M Eric Auger <eric.auger@linaro.org> - 2016-02-05 18:40 +0100
Re: ARM PCI/MSI KVM passthrough with GICv2M Alex Williamson <alex.williamson@redhat.com> - 2016-02-05 19:20 +0100
Re: ARM PCI/MSI KVM passthrough with GICv2M Christoffer Dall <christoffer.dall@linaro.org> - 2016-02-08 10:50 +0100
Re: ARM PCI/MSI KVM passthrough with GICv2M Eric Auger <eric.auger@linaro.org> - 2016-02-08 14:30 +0100
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