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RE: [PATCH 00/10] KVM PCIe/MSI passthrough on ARM/ARM64

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 Hello!
 I'd like just to clarify some things for myself and better wrap my head around it...

> On x86 all accesses to the 1MB PA region [FEE0_0000h - FEF0_000h] are directed
> as interrupt messages: accesses to this special PA window directly target the
> APIC configuration space and not DRAM, meaning the downstream IOMMU is bypassed.

 So, this is effectively the same as always having hardwired 1:1 mappings on all IOMMUs, isn't it ?
 If so, then we can't we just do the same, just by forcing similar 1:1 mapping? This is what i tried to do in my patchset. All of
you are talking about a situation which arises when we are emulating different machine with different physical addresses layout. And
e. g. if our host has MSI at 0xABADCAFE, our target could have valid RAM at the same location, and we need to handle it somehow,
therefore we have to move our MSI window out of target's RAM. But how does this work on a PC then? What if our host is PC, and we
want to emulate some ARM board, which has RAM at FE00 0000 ? Or does it mean that PC architecture is flawed and can reliably handle
PCI passthrough only for itself ?

Kind regards,
Pavel Fedin
Senior Engineer
Samsung Electronics Research center Russia

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[PATCH 00/10] KVM PCIe/MSI passthrough on ARM/ARM64 Eric Auger <eric.auger@linaro.org> - 2016-01-26 14:20 +0100
  [PATCH 09/10] vfio-pci: create an iommu mapping for msi address Eric Auger <eric.auger@linaro.org> - 2016-01-26 14:20 +0100
  [PATCH 01/10] iommu: Add DOMAIN_ATTR_MSI_MAPPING attribute Eric Auger <eric.auger@linaro.org> - 2016-01-26 14:20 +0100
  [PATCH 05/10] vfio/type1: attach a reserved iova domain to vfio_domain Eric Auger <eric.auger@linaro.org> - 2016-01-26 14:20 +0100
  [PATCH 10/10] vfio: allow the user to register reserved iova range for MSI mapping Eric Auger <eric.auger@linaro.org> - 2016-01-26 14:20 +0100
    Re: [PATCH 10/10] vfio: allow the user to register reserved iova  range for MSI mapping kbuild test robot <lkp@intel.com> - 2016-01-26 17:50 +0100
    Re: [PATCH 10/10] vfio: allow the user to register reserved iova  range for MSI mapping kbuild test robot <lkp@intel.com> - 2016-01-26 19:40 +0100
  [PATCH 06/10] vfio: introduce vfio_group_alloc_map_/unmap_free_reserved_iova Eric Auger <eric.auger@linaro.org> - 2016-01-26 14:20 +0100
    Re: [PATCH 06/10] vfio: introduce  vfio_group_alloc_map_/unmap_free_reserved_iova kbuild test robot <lkp@intel.com> - 2016-01-26 17:20 +0100
      Re: [PATCH 06/10] vfio: introduce  vfio_group_alloc_map_/unmap_free_reserved_iova Eric Auger <eric.auger@linaro.org> - 2016-01-26 17:40 +0100
  [PATCH 08/10] vfio: introduce vfio_group_require_msi_mapping Eric Auger <eric.auger@linaro.org> - 2016-01-26 14:20 +0100
  [PATCH 04/10] vfio: introduce VFIO_IOVA_RESERVED vfio_dma type Eric Auger <eric.auger@linaro.org> - 2016-01-26 14:20 +0100
  [PATCH 03/10] vfio_iommu_type1: add reserved binding RB tree management Eric Auger <eric.auger@linaro.org> - 2016-01-26 14:20 +0100
  [PATCH 02/10] vfio: expose MSI mapping requirement through VFIO_IOMMU_GET_INFO Eric Auger <eric.auger@linaro.org> - 2016-01-26 14:20 +0100
  RE: [PATCH 00/10] KVM PCIe/MSI passthrough on ARM/ARM64 Pavel Fedin <p.fedin@samsung.com> - 2016-01-26 18:30 +0100
    Re: [PATCH 00/10] KVM PCIe/MSI passthrough on ARM/ARM64 Eric Auger <eric.auger@linaro.org> - 2016-01-27 10:00 +0100

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