Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]
Groups > linux.kernel > #1313908
| From | Chen-Yu Tsai <wens@csie.org> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | [PATCH RFC 09/15] ARM: dts: sun6i: sina31s: Switch to mmc3 for onboard eMMC |
| Date | 2016-01-21 06:40 +0100 |
| Message-ID | <qTg8B-Im-17@gated-at.bofh.it> (permalink) |
| References | <qTg8v-Im-9@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
According to Allwinner, only mmc3 supports 8 bit DDR transfers for eMMC.
Switch to mmc3 for the onboard eMMC, and also assign vqmmc for signal
voltage sensing/switching, and "cap-mmc-hw-reset" to denote this
instance can use eMMC hardware reset.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
arch/arm/boot/dts/sun6i-a31s-sina31s-core.dtsi | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/sun6i-a31s-sina31s-core.dtsi b/arch/arm/boot/dts/sun6i-a31s-sina31s-core.dtsi
index ea69fb8ad4d8..4ec0c8679b2e 100644
--- a/arch/arm/boot/dts/sun6i-a31s-sina31s-core.dtsi
+++ b/arch/arm/boot/dts/sun6i-a31s-sina31s-core.dtsi
@@ -61,12 +61,14 @@
};
/* eMMC on core board */
-&mmc2 {
+&mmc3 {
pinctrl-names = "default";
- pinctrl-0 = <&mmc2_8bit_emmc_pins>;
+ pinctrl-0 = <&mmc3_8bit_emmc_pins>;
vmmc-supply = <®_dcdc1>;
+ vqmmc-supply = <®_dcdc1>;
bus-width = <8>;
non-removable;
+ cap-mmc-hw-reset;
status = "okay";
};
--
2.7.0.rc3
Back to linux.kernel | Previous | Next — Previous in thread | Next in thread | Find similar | Unroll thread
[PATCH RFC 00/15] mmc: sunxi: Support vqmmc regulator and eMMC DDR modes Chen-Yu Tsai <wens@csie.org> - 2016-01-21 06:40 +0100
[PATCH RFC 15/15] ARM: dts: sun9i: cubieboard4: Enable hardware reset and HS-DDR for eMMC Chen-Yu Tsai <wens@csie.org> - 2016-01-21 06:40 +0100
Re: [PATCH RFC 15/15] ARM: dts: sun9i: cubieboard4: Enable hardware reset and HS-DDR for eMMC Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-01-24 18:00 +0100
[PATCH RFC 09/15] ARM: dts: sun6i: sina31s: Switch to mmc3 for onboard eMMC Chen-Yu Tsai <wens@csie.org> - 2016-01-21 06:40 +0100
Re: [PATCH RFC 09/15] ARM: dts: sun6i: sina31s: Switch to mmc3 for onboard eMMC Hans de Goede <hdegoede@redhat.com> - 2016-01-21 12:20 +0100
Re: [PATCH RFC 09/15] ARM: dts: sun6i: sina31s: Switch to mmc3 for onboard eMMC Chen-Yu Tsai <wens@csie.org> - 2016-01-21 13:30 +0100
Re: [PATCH RFC 09/15] ARM: dts: sun6i: sina31s: Switch to mmc3 for onboard eMMC Hans de Goede <hdegoede@redhat.com> - 2016-01-21 13:30 +0100
Re: [PATCH RFC 09/15] ARM: dts: sun6i: sina31s: Switch to mmc3 for onboard eMMC Chen-Yu Tsai <wens@csie.org> - 2016-01-21 13:30 +0100
Re: [PATCH RFC 09/15] ARM: dts: sun6i: sina31s: Switch to mmc3 for onboard eMMC Hans de Goede <hdegoede@redhat.com> - 2016-01-21 13:40 +0100
Re: [PATCH RFC 09/15] ARM: dts: sun6i: sina31s: Switch to mmc3 for onboard eMMC Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-01-22 21:40 +0100
Re: [PATCH RFC 09/15] ARM: dts: sun6i: sina31s: Switch to mmc3 for onboard eMMC Chen-Yu Tsai <wens@csie.org> - 2016-01-23 05:30 +0100
Re: [PATCH RFC 09/15] ARM: dts: sun6i: sina31s: Switch to mmc3 for onboard eMMC Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-01-24 18:00 +0100
[PATCH RFC 02/15] mmc: sunxi: Return error on mmc_regulator_set_ocr() fail in .set_ios op Chen-Yu Tsai <wens@csie.org> - 2016-01-21 06:40 +0100
[PATCH RFC 06/15] mmc: sunxi: Support 8 bit eMMC DDR transfer modes Chen-Yu Tsai <wens@csie.org> - 2016-01-21 06:40 +0100
[PATCH RFC 12/15] ARM: dts: sun9i: Use sun9i specific mmc compatible Chen-Yu Tsai <wens@csie.org> - 2016-01-21 06:40 +0100
Re: [PATCH RFC 12/15] ARM: dts: sun9i: Use sun9i specific mmc compatible Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-01-22 21:50 +0100
Re: [PATCH RFC 12/15] ARM: dts: sun9i: Use sun9i specific mmc compatible Chen-Yu Tsai <wens@csie.org> - 2016-01-23 12:00 +0100
[PATCH RFC 11/15] ARM: dts: sun8i: sina33: Enable hardware reset and HS-DDR for eMMC Chen-Yu Tsai <wens@csie.org> - 2016-01-21 06:40 +0100
Re: [PATCH RFC 11/15] ARM: dts: sun8i: sina33: Enable hardware reset and HS-DDR for eMMC Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-01-22 21:50 +0100
[PATCH RFC 10/15] ARM: dts: sun8i: Include SDC2_RST pin in mmc2_8bit_pins Chen-Yu Tsai <wens@csie.org> - 2016-01-21 06:40 +0100
Re: [PATCH RFC 10/15] ARM: dts: sun8i: Include SDC2_RST pin in mmc2_8bit_pins Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-01-24 18:00 +0100
[PATCH RFC 01/15] mmc: sunxi: Document host init sequence Chen-Yu Tsai <wens@csie.org> - 2016-01-21 06:40 +0100
[PATCH RFC 13/15] ARM: dts: sun9i: Include SDC2_RST pin in mmc2_8bit_pins Chen-Yu Tsai <wens@csie.org> - 2016-01-21 06:40 +0100
Re: [PATCH RFC 13/15] ARM: dts: sun9i: Include SDC2_RST pin in mmc2_8bit_pins Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-01-24 18:00 +0100
[PATCH RFC 07/15] mmc: sunxi: Enable eMMC HS-DDR (MMC_CAP_1_8V_DDR) support Chen-Yu Tsai <wens@csie.org> - 2016-01-21 06:40 +0100
[PATCH RFC 05/15] mmc: sunxi: Support MMC_DDR52 timing modes Chen-Yu Tsai <wens@csie.org> - 2016-01-21 06:40 +0100
Re: [PATCH RFC 05/15] mmc: sunxi: Support MMC_DDR52 timing modes Hans de Goede <hdegoede@redhat.com> - 2016-01-21 12:20 +0100
Re: [PATCH RFC 05/15] mmc: sunxi: Support MMC_DDR52 timing modes Chen-Yu Tsai <wens@csie.org> - 2016-01-21 13:00 +0100
Re: [PATCH RFC 05/15] mmc: sunxi: Support MMC_DDR52 timing modes Hans de Goede <hdegoede@redhat.com> - 2016-01-21 13:30 +0100
[PATCH RFC 08/15] ARM: dts: sun6i: Add mmc3 pins for 8 bit emmc Chen-Yu Tsai <wens@csie.org> - 2016-01-21 06:40 +0100
Re: [PATCH RFC 08/15] ARM: dts: sun6i: Add mmc3 pins for 8 bit emmc Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-01-22 21:40 +0100
Re: [PATCH RFC 08/15] ARM: dts: sun6i: Add mmc3 pins for 8 bit emmc Chen-Yu Tsai <wens@csie.org> - 2016-01-23 12:10 +0100
Re: [PATCH RFC 08/15] ARM: dts: sun6i: Add mmc3 pins for 8 bit emmc Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-01-24 18:00 +0100
[PATCH RFC 14/15] ARM: dts: sun9i: a80-optimus: Enable hardware reset and HS-DDR for eMMC Chen-Yu Tsai <wens@csie.org> - 2016-01-21 06:40 +0100
Re: [PATCH RFC 14/15] ARM: dts: sun9i: a80-optimus: Enable hardware reset and HS-DDR for eMMC Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-01-24 18:00 +0100
Re: [PATCH RFC 00/15] mmc: sunxi: Support vqmmc regulator and eMMC DDR modes Hans de Goede <hdegoede@redhat.com> - 2016-01-21 12:20 +0100
csiph-web