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Groups > linux.kernel > #1309389
| From | Maxime Ripard <maxime.ripard@free-electrons.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | [PATCH v2 22/26] ARM: sun5i: r8: Add display blocks to the DTSI |
| Date | 2016-01-14 16:30 +0100 |
| Message-ID | <qQS0y-uX-15@gated-at.bofh.it> (permalink) |
| References | <qQS0x-uX-7@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
The TCON, tv-encoder and display engine backends and frontends are combined
to create our display pipeline.
Add them to the R8 DTSI. It's supposed to be perfectly compatible with the
A10s and A13, but since we haven't tested it on them yet, it's safer to
just enable it on the R8. Eventually, it should be moved to sun5i.dtsi
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
arch/arm/boot/dts/sun5i-r8.dtsi | 134 ++++++++++++++++++++++++++++++++++++++++
1 file changed, 134 insertions(+)
diff --git a/arch/arm/boot/dts/sun5i-r8.dtsi b/arch/arm/boot/dts/sun5i-r8.dtsi
index 691d3de75b35..b3bf91516a80 100644
--- a/arch/arm/boot/dts/sun5i-r8.dtsi
+++ b/arch/arm/boot/dts/sun5i-r8.dtsi
@@ -57,4 +57,138 @@
status = "disabled";
};
};
+
+ soc@01c00000 {
+ tve0: tv-encoder@01c0a000 {
+ compatible = "allwinner,sun4i-a10-tv-encoder";
+ reg = <0x01c0a000 0x1000>;
+ clocks = <&ahb_gates 34>;
+ status = "disabled";
+
+ port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ tve0_in_tcon0: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&tcon0_out_tve0>;
+ };
+ };
+ };
+
+ tcon0: lcd-controller@01c0c000 {
+ compatible = "allwinner,sun4i-a10-tcon";
+ reg = <0x01c0c000 0x1000>;
+ interrupts = <44>;
+ clocks = <&ahb_gates 36>,
+ <&tcon_ch0_clk>,
+ <&tcon_ch1_clk>;
+ clock-names = "ahb",
+ "tcon-ch0",
+ "tcon-ch1";
+ clock-output-names = "tcon-pixel-clock";
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ tcon0_in: port@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+
+ tcon0_in_be0: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&be0_out_tcon0>;
+ };
+ };
+
+ tcon0_out: port@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+
+ tcon0_out_tve0: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&tve0_in_tcon0>;
+ };
+ };
+ };
+ };
+
+ fe0: display-frontend@01e00000 {
+ compatible = "allwinner,sun5i-a13-display-frontend";
+ reg = <0x01e00000 0x20000>;
+ interrupts = <47>;
+ clocks = <&ahb_gates 46>, <&de_fe_clk>,
+ <&dram_gates 25>;
+ clock-names = "ahb", "mod",
+ "ram";
+ resets = <&de_fe_clk>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ fe0_out: port@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+
+ fe0_out_be0: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&be0_in_fe0>;
+ };
+ };
+ };
+ };
+
+ be0: display-backend@01e60000 {
+ compatible = "allwinner,sun5i-a13-display-backend";
+ reg = <0x01e60000 0x10000>;
+ clocks = <&ahb_gates 44>, <&de_be_clk>,
+ <&dram_gates 26>;
+ clock-names = "ahb", "mod",
+ "ram";
+ resets = <&de_be_clk>;
+ status = "disabled";
+
+ assigned-clocks = <&de_be_clk>;
+ assigned-clock-rates = <300000000>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ be0_in: port@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+
+ be0_in_fe0: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&fe0_out_be0>;
+ };
+ };
+
+ be0_out: port@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+
+ be0_out_tcon0: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&tcon0_in_be0>;
+ };
+ };
+ };
+ };
+ };
+
+ display-engine {
+ compatible = "allwinner,sun5i-a13-display-engine";
+ pipelines = <&be0>;
+ };
};
--
2.6.4
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[PATCH v2 00/26] drm: Add Allwinner A10 display engine support Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-01-14 16:30 +0100
[PATCH v2 03/26] clk: Add regmap support Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-01-14 16:30 +0100
[PATCH v2 22/26] ARM: sun5i: r8: Add display blocks to the DTSI Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-01-14 16:30 +0100
[PATCH v2 20/26] drm: sun4i: tv: Add PAL output standard Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-01-14 16:30 +0100
[PATCH v2 21/26] drm: sun4i: tv: Add NTSC output standard Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-01-14 16:30 +0100
[PATCH v2 10/26] ARM: sun5i: a13: Add display and TCON clocks Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-01-14 16:30 +0100
[PATCH v2 18/26] drm: sun4i: Add RGB output Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-01-14 16:30 +0100
[PATCH v2 23/26] ARM: sun5i: chip: Enable the TV Encoder Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-01-14 16:30 +0100
[PATCH v2 11/26] ARM: sun5i: Add DRAM gates Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-01-14 16:30 +0100
[PATCH v2 19/26] drm: sun4i: Add composite output Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-01-14 16:30 +0100
[PATCH v2 08/26] clk: sun5i: add DRAM gates Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-01-14 16:30 +0100
Re: [PATCH v2 08/26] clk: sun5i: add DRAM gates Rob Herring <robh@kernel.org> - 2016-01-15 04:10 +0100
[PATCH v2 06/26] clk: sunxi: Add PLL3 clock Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-01-14 16:30 +0100
Re: [PATCH v2 06/26] clk: sunxi: Add PLL3 clock Rob Herring <robh@kernel.org> - 2016-01-15 04:10 +0100
[PATCH v2 04/26] clk: composite: Add unregister function Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-01-14 16:30 +0100
[PATCH v2 02/26] reset: Make reset_control_ops const Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-01-14 16:40 +0100
[PATCH v2 07/26] clk: sunxi: Add TCON channel1 clock Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-01-14 16:40 +0100
Re: [PATCH v2 07/26] clk: sunxi: Add TCON channel1 clock Rob Herring <robh@kernel.org> - 2016-01-15 04:10 +0100
[PATCH v2 26/26] DO NOT MERGE: ARM: sun5i: chip: Enable the LCD panel Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-01-14 16:40 +0100
[PATCH v2 15/26] drm/modes: Support modes names on the command line Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-01-14 16:40 +0100
[PATCH v2 14/26] drm/modes: Rewrite the command line parser Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-01-14 16:40 +0100
[PATCH v2 17/26] drm: sun4i: Add DT bindings documentation Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-01-14 16:40 +0100
Re: [PATCH v2 17/26] drm: sun4i: Add DT bindings documentation Rob Herring <robh@kernel.org> - 2016-01-15 04:20 +0100
[PATCH v2 12/26] ARM: sun5i: Add TV encoder gate to the DTSI Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-01-14 16:40 +0100
[PATCH v2 25/26] drm/panel: simple: Add timings for the Olimex LCD-OLinuXino-4.3TS Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-01-14 16:40 +0100
Re: [PATCH v2 25/26] drm/panel: simple: Add timings for the Olimex LCD-OLinuXino-4.3TS Rob Herring <robh@kernel.org> - 2016-01-15 04:20 +0100
[PATCH v2 13/26] drm/fb_cma_helper: Remove implicit call to disable_unused_functions Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-01-14 16:40 +0100
Re: [PATCH v2 13/26] drm/fb_cma_helper: Remove implicit call to disable_unused_functions Laurent Pinchart <laurent.pinchart@ideasonboard.com> - 2016-01-15 00:20 +0100
[PATCH v2 05/26] clk: sunxi: Add display and TCON0 clocks driver Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-01-14 16:40 +0100
Re: [PATCH v2 05/26] clk: sunxi: Add display and TCON0 clocks driver Rob Herring <robh@kernel.org> - 2016-01-15 04:10 +0100
[PATCH v2 24/26] devicetree: Add olimex vendor prefix Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-01-14 16:40 +0100
Re: [PATCH v2 24/26] devicetree: Add olimex vendor prefix Rob Herring <robh@kernel.org> - 2016-01-15 04:20 +0100
Re: [PATCH v2 24/26] devicetree: Add olimex vendor prefix Stefan Wahren <stefan.wahren@i2se.com> - 2016-01-15 07:50 +0100
Re: [PATCH v2 24/26] devicetree: Add olimex vendor prefix Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-01-15 09:10 +0100
[PATCH v2 09/26] ARM: sun5i: dt: Add pll3 and pll7 clocks Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-01-14 16:40 +0100
[PATCH v2 01/26] reset: Move DT cell size check to the core Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-01-14 16:50 +0100
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