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[tip:x86/asm] x86/fpu: Disable XGETBV1 when no XSAVE

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Commit-ID:  eb7c5f872e697b0aebd846cf3a3328d71e9decb2
Gitweb:     http://git.kernel.org/tip/eb7c5f872e697b0aebd846cf3a3328d71e9decb2
Author:     yu-cheng yu <yu-cheng.yu@intel.com>
AuthorDate: Wed, 6 Jan 2016 14:24:52 -0800
Committer:  Ingo Molnar <mingo@kernel.org>
CommitDate: Tue, 12 Jan 2016 11:51:21 +0100

x86/fpu: Disable XGETBV1 when no XSAVE

When "noxsave" is given as a command-line input, the kernel
should disable XGETBV1. This issue currently does not cause any
actual problems. XGETBV1 is only useful if we have something
using the 'init optimization' (i.e. xsaveopt, xsaves). We
already clear both of those in fpu__xstate_clear_all_cpu_caps().
But this is good for completeness.

Signed-off-by: Yu-cheng Yu <yu-cheng.yu@intel.com>
Reviewed-by: Dave Hansen <dave.hansen@intel.com>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Borislav Petkov <bp@suse.de>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: Fenghua Yu <fenghua.yu@intel.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Quentin Casasnovas <quentin.casasnovas@oracle.com>
Cc: Ravi V. Shankar <ravi.v.shankar@intel.com>
Cc: Sai Praneeth Prakhya <sai.praneeth.prakhya@intel.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: yu-cheng yu <yu-cheng.yu@intel.com>
Link: http://lkml.kernel.org/r/1452119094-7252-3-git-send-email-yu-cheng.yu@intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
---
 arch/x86/kernel/fpu/xstate.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/x86/kernel/fpu/xstate.c b/arch/x86/kernel/fpu/xstate.c
index 40f1002..d489f27 100644
--- a/arch/x86/kernel/fpu/xstate.c
+++ b/arch/x86/kernel/fpu/xstate.c
@@ -52,6 +52,7 @@ void fpu__xstate_clear_all_cpu_caps(void)
 	setup_clear_cpu_cap(X86_FEATURE_AVX512ER);
 	setup_clear_cpu_cap(X86_FEATURE_AVX512CD);
 	setup_clear_cpu_cap(X86_FEATURE_MPX);
+	setup_clear_cpu_cap(X86_FEATURE_XGETBV1);
 }
 
 /*

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[PATCH 0/4] x86/fpu: FPU init code bugfixes yu-cheng yu <yu-cheng.yu@intel.com> - 2016-01-06 23:40 +0100
  [PATCH 2/4] x86/fpu: Disable XGETBV1 when no XSAVE yu-cheng yu <yu-cheng.yu@intel.com> - 2016-01-06 23:40 +0100
    [tip:x86/asm] x86/fpu: Disable XGETBV1 when no XSAVE tip-bot for yu-cheng yu <tipbot@zytor.com> - 2016-01-12 13:10 +0100
  [PATCH 3/4] x86/fpu: Disable MPX when eagerfpu is off yu-cheng yu <yu-cheng.yu@intel.com> - 2016-01-06 23:40 +0100
    [tip:x86/asm] x86/fpu: Disable MPX when eagerfpu is off tip-bot for yu-cheng yu <tipbot@zytor.com> - 2016-01-12 13:10 +0100
  [PATCH 4/4] x86/fpu: Disable AVX when eagerfpu is off yu-cheng yu <yu-cheng.yu@intel.com> - 2016-01-06 23:40 +0100
    [tip:x86/asm] x86/fpu: Disable AVX when eagerfpu is off tip-bot for yu-cheng yu <tipbot@zytor.com> - 2016-01-12 13:10 +0100
  [PATCH 1/4] x86/fpu: Fix early fpu command-line parsing yu-cheng yu <yu-cheng.yu@intel.com> - 2016-01-06 23:40 +0100
    [tip:x86/asm] x86/fpu: Fix early FPU command-line parsing tip-bot for yu-cheng yu <tipbot@zytor.com> - 2016-01-12 13:10 +0100

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