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Groups > linux.kernel > #1306097
| From | Mark Rutland <mark.rutland@arm.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | Re: [PATCH v5 05/11] arm-cci PMU: Delay counter writes to pmu_enable |
| Date | 2016-01-11 12:30 +0100 |
| Message-ID | <qPIPE-1Dk-35@gated-at.bofh.it> (permalink) |
| References | (1 earlier) <qNbXR-2ZX-41@gated-at.bofh.it> <qNiZk-7GT-11@gated-at.bofh.it> <qNwzg-j5-11@gated-at.bofh.it> <qPIcX-17S-25@gated-at.bofh.it> <qPIwj-1vs-39@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
On Mon, Jan 11, 2016 at 11:08:27AM +0000, Suzuki K. Poulose wrote: > On 11/01/16 10:46, Mark Rutland wrote: > >On Tue, Jan 05, 2016 at 09:59:13AM +0000, Suzuki K. Poulose wrote: > >>On 04/01/16 19:24, Mark Rutland wrote: > >>>On Mon, Jan 04, 2016 at 11:54:44AM +0000, Suzuki K. Poulose wrote: > >>The pmu is not disabled while we are in overflow irq handler. Hence there may > >>not be a pmu_enable() which would set the period for the counter which > >>overflowed, if defer the write in that case. Is that assumption wrong ? > > > >As the driver stands today, yes. > > > >However, wouldn't it make more sense to disable the PMU for the overflow > >handler, such that we can reuse the batching logic? > > None of the PMU drivers do that AFAIK. I see. The Intel PMU driver disables the PMU for the interrupt handler; see intel_pmu_handle_irq in arch/x86/kernel/cpu/perf_event_intel.c. It looks like that's a special-case for sampling. I guess we may have the only case where it makes sense to batch counter writes as opposed to batching configuration writes. > Hence, didn't want to change it for CCI. We could use the batching > logic, if decide to do so. I can go ahead with that if there are no > other side effects with that. We'll lose events regardless as our RMW sequence will race against the counters. Batching will make that window slightly larger, but other than that I don't see a problem. Thanks, Mark.
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[PATCH v5 05/11] arm-cci PMU: Delay counter writes to pmu_enable "Suzuki K. Poulose" <suzuki.poulose@arm.com> - 2016-01-04 13:00 +0100
Re: [PATCH v5 05/11] arm-cci PMU: Delay counter writes to pmu_enable Mark Rutland <mark.rutland@arm.com> - 2016-01-04 20:30 +0100
Re: [PATCH v5 05/11] arm-cci PMU: Delay counter writes to pmu_enable "Suzuki K. Poulose" <Suzuki.Poulose@arm.com> - 2016-01-05 11:00 +0100
Re: [PATCH v5 05/11] arm-cci PMU: Delay counter writes to pmu_enable Mark Rutland <mark.rutland@arm.com> - 2016-01-11 11:50 +0100
Re: [PATCH v5 05/11] arm-cci PMU: Delay counter writes to pmu_enable "Suzuki K. Poulose" <Suzuki.Poulose@arm.com> - 2016-01-11 12:10 +0100
Re: [PATCH v5 05/11] arm-cci PMU: Delay counter writes to pmu_enable Mark Rutland <mark.rutland@arm.com> - 2016-01-11 12:30 +0100
Re: [PATCH v5 05/11] arm-cci PMU: Delay counter writes to pmu_enable "Suzuki K. Poulose" <Suzuki.Poulose@arm.com> - 2016-01-11 19:20 +0100
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