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Re: [RFC PATCH] Add IPI entry for CPU UP

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On 11 January 2016 at 19:03, Mark Rutland <mark.rutland@arm.com> wrote:
> On Mon, Jan 11, 2016 at 10:55:08AM +0000, Zhaoyang Huang (黄朝阳) wrote:
>>
>> ________________________________________
>> From: Catalin Marinas <catalin.marinas@arm.com>
>> Sent: Monday, January 11, 2016 6:06 PM
>> To: Lorenzo Pieralisi
>> Cc: Zhaoyang Huang; Zhaoyang Huang (黄朝阳); will.deacon@arm.com; linux-kernel@vger.kernel.org; hanjun.guo@linaro.org; suzuki.poulose@arm.com; Mark Rutland
>> Subject: Re: [RFC PATCH] Add IPI entry for CPU UP
>>
>> On Mon, Jan 11, 2016 at 09:59:25AM +0000, Lorenzo Pieralisi wrote:
>> > On Mon, Jan 11, 2016 at 03:10:40PM +0800, Zhaoyang Huang wrote:
>> > > In some ARM SOCs, IPI interrupt is used for hotplug in one cpu, that is,
>> > > sending a IPI to the core in WFI and powerdown status. So Add a IPI
>> > > entry for handle this kind of cpu up interrupt
>> >
>> > On arm64 SOCs, with a mainline kernel, you can only hotplug CPUs out
>> > and back in by using the PSCI firmware interface, which does not
>> > require an IPI to boot a CPU, therefore this patch is useless.
>>
>> I fully agree.
>>
>> BTW, such patches should cc linux-arm-kernel@lists.infradead.org as well
>> since they are ARM related.
>>
>> Hi both,
>> In fact, this patch is related to the counterpart of the PSCI code in
>> kernel world which you mentioned before. In SPRD's SOC, we have to
>> implement a way of "wakeup" the core in powerdown state, which is to
>> launch a IPI to the dest core.
>
> This is not required with PSCI, which abstracts the wakeup and power
> management behind the CPU_ON call.
>
> The kernel should only have to issue a CPU_ON call, and the firmware
> should do the right thing behind the scenes (e.g. enabling power to the
> core, sending an IPI if necessary).
>
> If the kernel needs to do anything other than issue a CPU_ON call, this
> is not PSCI.
>
>> The reason why we can not accessing power related register to light on
>> the core is the state machine of the PMU will not be safe for this
>> scenario.
>
> I'm not sure I understand.
>
> Which software agent (kernel? firmware?) cannot access this PMU
> register, and why?
>
> What is the problem with the PMU state machine?
>
With regarding to the cpu down, we use a so called "auto power down"
mode, which have the PMU power down the core after it detect WFI
status(in fact, it is the same method for cpu suspend for our SOC). By
using this kind of method of power down, we have to use the method
which I mentioned above for power on. In fact, we have ever used
another method of on/off, which have NOT the issue of launch IPI(we
call it as force shutdown). But it has some stability problem for cpu
on(PC will run out of range. ASIC engineers ask us to switch to auto
mode to solve it)

> Thanks,
> Mark.

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Thread

[RFC PATCH] Add IPI entry for CPU UP Zhaoyang Huang <zhaoyang.huang@linaro.org> - 2016-01-11 08:20 +0100
  Re: [RFC PATCH] Add IPI entry for CPU UP Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> - 2016-01-11 11:00 +0100
    Re: [RFC PATCH] Add IPI entry for CPU UP Catalin Marinas <catalin.marinas@arm.com> - 2016-01-11 11:10 +0100
      Re: [RFC PATCH] Add IPI entry for CPU UP Mark Rutland <mark.rutland@arm.com> - 2016-01-11 12:10 +0100
        Re: [RFC PATCH] Add IPI entry for CPU UP Zhaoyang Huang <zhaoyang.huang@linaro.org> - 2016-01-11 12:30 +0100
          Re: [RFC PATCH] Add IPI entry for CPU UP Mark Rutland <mark.rutland@arm.com> - 2016-01-11 12:40 +0100
      RE: [RFC PATCH] Add IPI entry for CPU UP Zhaoyang Huang (黄朝阳)   <Zhaoyang.Huang@spreadtrum.com> - 2016-01-11 17:10 +0100

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